Leakage power reduction by dual-vth designs under probabilistic analysis of vth variation. - Michael Liu; Wei-Shen Wang; Michael Orshansky (ISLPED, 2004)

Statistical timing based on incomplete probabilistic descriptions of parameter uncertainty. - Wei-Shen Wang; Vladik Kreinovich; Michael Orshansky (DAC, 2006)

Robust estimation of parametric yield under limited descriptions of uncertainty. - Wei-Shen Wang; Michael Orshansky (ICCAD, 2006)

FASER: Fast Analysis of Soft Error Susceptibility for Cell-Based Designs. - Bin Zhang 011; Wei-Shen Wang; Michael Orshansky (ISQED, 2006)

Interval-based robust statistical techniques for non-negative convex functions, with application to timing analysis of computer chips. - Michael Orshansky; Wei-Shen Wang; Martine Ceberio; Gang Xiang (SAC, 2006)

Analysis of Leakage Power Reduction in Dual-Vth Technologies in the Presence of Large Threshold Voltage Variation. - Wei-Shen Wang; Michael Liu; Michael Orshansky (J. Low Power Electron., 2006)

Path-Based Statistical Timing Analysis Handling Arbitrary Delay Correlations: Theory and Implementation. - Wei-Shen Wang; Michael Orshansky (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006)

Estimation of Leakage Power Consumption and Parametric Yield Based on Realistic Probabilistic Descriptions of Parameters. - Wei-Shen Wang; Michael Orshansky (J. Low Power Electron., 2007)

Statistical analysis of circuit timing using majorization. - Michael Orshansky; Wei-Shen Wang (Commun. ACM, 2009)

Thermal-Aware Test Frequency Optimization. - Wei-Shen Wang; Zhe-Jia Liang; James Chien-Mo Li; Norman Chang; Akhilesh Kumar; Ying-Shiun Li (ITC-Asia, 2024)

Efficient ML-Based Transient Thermal Prediction for 3D-ICs. - Yun-Feng Yang; Wei-Shen Wang; Yung-Jen Lee; James Chien-Mo Li; Norman Chang; Akhilesh Kumar; Ying-Shiun Li; Jessica Yen; Lang Lin (ASP-DAC, 2025)