Wei Song
Orcid: 0000-0001-5649-1580Affiliations:
- Institute of Information Engineering, Chinese Academy of Sciences, China
- University of Cambridge, Computer Laboratory, UK (former)
- The University of Manchester, School of Computer Science, UK (PhD 2011)
According to our database1,
Wei Song
authored at least 25 papers
between 2009 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
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Online presence:
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on orcid.org
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on github.com
On csauthors.net:
Bibliography
2024
Randomizing Set-Associative Caches Against Conflict-Based Cache Side-Channel Attacks.
IEEE Trans. Computers, April, 2024
2023
Proceedings of the 26th International Symposium on Research in Attacks, 2023
2022
Proceedings of the Advances in Information and Computer Security, 2022
2021
A Comprehensive and Cross-Platform Test Suite for Memory Safety - Towards an Open Framework for Testing Processor Hardware Supported Security Extensions.
CoRR, 2021
Randomized Last-Level Caches Are Still Vulnerable to Cache Side-Channel Attacks! But We Can Fix It.
Proceedings of the 42nd IEEE Symposium on Security and Privacy, 2021
2019
ACM Trans. Archit. Code Optim., 2019
Dynamically Finding Minimal Eviction Sets Can Be Quicker Than You Think for Side-Channel Attacks against the LLC.
Proceedings of the 22nd International Symposium on Research in Attacks, 2019
2018
Proceedings of the Advanced Computer Architecture - 12th Conference, 2018
2017
Handling Physical-Layer Deadlock Caused by Permanent Faults in Quasi-Delay-Insensitive Networks-on-Chip.
IEEE Trans. Very Large Scale Integr. Syst., 2017
2016
Proceedings of the 24th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2016
2015
Deadlock Recovery in Asynchronous Networks on Chip in the Presence of Transient Faults.
Proceedings of the 21st IEEE International Symposium on Asynchronous Circuits and Systems, 2015
2014
Protecting QDI interconnects from transient faults using delay-insensitive redundant check codes.
Microprocess. Microsystems, 2014
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
On-line detection of the deadlocks caused by permanently faulty links in quasi-delay insensitive networks on chip.
Proceedings of the Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21, 2014
An empirical evaluation of High-Level Synthesis languages and tools for database acceleration.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014
Proceedings of the 20th IEEE International Symposium on Asynchronous Circuits and Systems, 2014
2013
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013
2012
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
2011
2010
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010
Proceedings of the 10th International Conference on Application of Concurrency to System Design, 2010
2009
Proceedings of the Third International Symposium on Networks-on-Chips, 2009
Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2009