21.2 A 2.3GHz fractional-N dividerless phase-locked loop with -112dBc/Hz in-band phase noise. - Po-Chun Huang; Wei-Sung Chang; Tai-Cheng Lee (ISSCC, 2014)

A 3X-oversampling hybrid clock and data recovery circuit with programmable bandwidth. - Jia-An Jheng; Wei-Sung Chang; Tai-Cheng Lee (VLSI-DAT, 2014)

A Fractional-N Divider-Less Phase-Locked Loop With a Subsampling Phase Detector. - Wei-Sung Chang; Po-Chun Huang; Tai-Cheng Lee (IEEE J. Solid State Circuits, 2014)

A 5 GHz Fractional-N ADC-Based Digital Phase-Locked Loops With -243.8 dB FOM. - Wei-Sung Chang; Tai-Cheng Lee (IEEE Trans. Circuits Syst. I Regul. Pap., 2016)

An energy-efficient self-charged crystal oscillator with a quadrature-phase shifter technique. - Wei-Sung Chang; Dai-En Jhou; Yu-Hong Yang; Tai-Cheng Lee (A-SSCC, 2017)

A 5 GHz Outer-Loop Phase Noise Filter with Delay-Sampling Technique. - Kun-Ruei Li; Wei-Sung Chang; Tai-Cheng Lee (ISCAS, 2020)