Bipartition Architecture for Low Power JPEG Huffman Decoder. - Shanq-Jang Ruan; Wei-Te Lin (Asia-Pacific Computer Systems Architecture Conference, 2007)

Realistic Character Motion Response in Computer Fighting Game. - Huai-Che Lee; Chia-Ming Chang; Jui-Shiang Chao; Wei-Te Lin (ISM, 2007)

A Compact Dynamic-Performance-Improved Current-Steering DAC With Random Rotation-Based Binary-Weighted Selection. - Wei-Te Lin; Tai-Haur Kuo (IEEE J. Solid State Circuits, 2012)

A 12b 1.6GS/s 40mW DAC in 40nm CMOS with >70dB SFDR over entire Nyquist bandwidth. - Wei-Te Lin; Tai-Haur Kuo (ISSCC, 2013)

A 12-bit 40 nm DAC Achieving SFDR > 70 dB at 1.6 GS/s and IMD < -61dB at 2.8 GS/s With DEMDRZ Technique. - Wei-Te Lin; Hung-Yi Huang; Tai-Haur Kuo (IEEE J. Solid State Circuits, 2014)