Wei Wang

Orcid: 0000-0002-5608-1319

Affiliations:
  • Shenzhen University, College of Electronic Science and Technology, China


According to our database1, Wei Wang authored at least 5 papers between 2017 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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PhD thesis 
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Bibliography

2019
A 13-bit 8-kS/s Δ-Σ Readout IC Using ZCB Integrators With an Embedded Resistive Sensor Achieving 1.05-pJ/Conversion Step and a 65-dB PSRR.
IEEE Trans. Very Large Scale Integr. Syst., 2019

2018
A 1 pF-to-10 nF Generic Capacitance-to-Digital Converter Using Zero-Crossing ΔΣ Modulation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

A 480 fJ/conversion-step 13-bit Resistive Sensor Readout IC with a 1%/V Power Supply Sensitivity.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

An Energy-Efficient 13-bit Zero-Crossing ΔΣ Capacitance-to-Digital Converter with 1 pF-to-10 nF Sensing Range.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017
A high-sensitivity signal conditioning interface for capacitive touch key using ΔΣ modulation.
Proceedings of the International SoC Design Conference, 2017


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