Micropower two-stage amplifier employing recycling current-buffer Miller compensation. - Wei Wang 177; Zushu Yan; Pui-In Mak; Man-Kay Law; Rui Paulo Martins (ISCAS, 2014)

A 0.0045-mm2 32.4-µW Two-Stage Amplifier for pF-to-nF Load Using CM Frequency Compensation. - Zushu Yan; Wei Wang 177; Pui-In Mak; Man-Kay Law; Rui Paulo Martins (IEEE Trans. Circuits Syst. II Express Briefs, 2015)

A 5.35 mW 10 MHz bandwidth CT third-order ΔΣ modulator with single Opamp achieving 79.6/84.5 dB SNDR/DR in 65 nm CMOS. - Wei Wang 177; Yan Zhu 001; Chi-Hang Chan; Seng-Pan U; Rui Paulo Martins (A-SSCC, 2017)

A 5.35-mW 10-MHz Single-Opamp Third-Order CT ΔΣ Modulator With CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS. - Wei Wang 177; Yan Zhu 001; Chi-Hang Chan; Rui Paulo Martins (IEEE J. Solid State Circuits, 2018)

A 72.6dB-SNDR 100MHz-BW 16.36mW CTDSM with Preliminary Sampling and Quantization Scheme in Backend Subranging QTZ. - Wei Wang 177; Chi-Hang Chan; Yan Zhu 001; Rui Paulo Martins (ISSCC, 2019)

A 10.4mW 50MHz-BW 80dB-DR Single-Opamp Third-Order CTSDM with SAB-ELD-Merged Integrator and 3-Stage Opamp. - Kai Xing; Wei Wang 177; Yan Zhu 001; Chi-Hang Chan; Rui Paulo Martins (VLSI Circuits, 2020)

A 100-MHz BW 72.6-dB-SNDR CT ΔΣ Modulator Utilizing Preliminary Sampling and Quantization. - Wei Wang 177; Chi-Hang Chan; Yan Zhu 001; Rui Paulo Martins (IEEE J. Solid State Circuits, 2020)

A Single-Opamp Third Order CT ΔΣ Modulator With SAB-ELD-Merged Integrator and Three-Stage Hybrid Compensation Opamp. - Kai Xing; Wei Wang 177; Yan Zhu 001; Chi-Hang Chan; Rui Paulo Martins (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)