Spin-transfer torque magnetoresistive content addressable memory (CAM) cell structure design with enhanced search noise margin. - Wei Xu 021; Tong Zhang 002; Yiran Chen 001 (ISCAS, 2008)

Improving STT MRAM storage density through smaller-than-worst-case transistor sizing. - Wei Xu 021; Yiran Chen 001; Xiaobin Wang; Tong Zhang 002 (DAC, 2009)

Data manipulation techniques to reduce phase change memory write energy. - Wei Xu 021; Jibang Liu; Tong Zhang 002 (ISLPED, 2009)

A nondestructive self-reference scheme for Spin-Transfer Torque Random Access Memory (STT-RAM). - Yiran Chen 001; Hai Li 001; Xiaobin Wang; Wenzhong Zhu; Wei Xu 021; Tong Zhang 002 (DATE, 2010)

Combined magnetic- and circuit-level enhancements for the nondestructive self-reference scheme of STT-RAM. - Yiran Chen 001; Hai Li 001; Xiaobin Wang; Wenzhong Zhu; Wei Xu 021; Tong Zhang 002 (ISLPED, 2010)

Using time-aware memory sensing to address resistance drift issue in multi-level phase change memory. - Wei Xu 021; Tong Zhang 002 (ISQED, 2010)

Design of Spin-Torque Transfer Magnetoresistive RAM and CAM/TCAM with High Sensing and Search Speed. - Wei Xu 021; Tong Zhang 002; Yiran Chen 001 (IEEE Trans. Very Large Scale Integr. Syst., 2010)

Design of Last-Level On-Chip Cache Using Spin-Torque Transfer RAM (STT RAM). - Wei Xu 021; Hongbin Sun 001; Xiaobin Wang; Yiran Chen 001; Tong Zhang 002 (IEEE Trans. Very Large Scale Integr. Syst., 2011)

A Time-Aware Fault Tolerance Scheme to Improve Reliability of Multilevel Phase-Change Memory in the Presence of Significant Resistance Drift. - Wei Xu 021; Tong Zhang 002 (IEEE Trans. Very Large Scale Integr. Syst., 2011)

A 130 nm 1.2 V/3.3 V 16 Kb Spin-Transfer Torque Random Access Memory With Nondestructive Self-Reference Sensing Scheme. - Yiran Chen 001; Hai Li 001; Xiaobin Wang; Wenzhong Zhu; Wei Xu 021; Tong Zhang 002 (IEEE J. Solid State Circuits, 2012)

Using Magnetic RAM to Build Low-Power and Soft Error-Resilient L1 Cache. - Hongbin Sun 001; Chuanyin Liu; Wei Xu 021; Jizhong Zhao; Nanning Zheng 001; Tong Zhang 002 (IEEE Trans. Very Large Scale Integr. Syst., 2012)

Using Multilevel Phase Change Memory to Build Data Storage: A Time-Aware System Design Perspective. - Qi Wu 006; Fei Sun; Wei Xu 021; Tong Zhang 002 (IEEE Trans. Computers, 2013)

Exploring the Use of Emerging Nonvolatile Memory Technologies in Future FPGAs. - Yangyang Pan; Yiran Li 001; Hongbin Sun 001; Wei Xu 021; Nanning Zheng 001; Tong Zhang 002 (IEEE Trans. Very Large Scale Integr. Syst., 2013)