Incremental and on-demand random walk for iterative power distribution network analysis. - Yiyu Shi 001; Wei Yao 002; Jinjun Xiong; Lei He 001 (ASP-DAC, 2009)

Joint design-time and post-silicon optimization for digitally tuned analog circuits. - Wei Yao 002; Yiyu Shi 001; Lei He 001; Sudhakar Pamarti (ICCAD, 2009)

Worst case timing jitter and amplitude noise in differential signaling. - Wei Yao 002; Yiyu Shi 001; Lei He 001; Sudhakar Pamarti; Yu Hu 002 (ISQED, 2009)

System-in-Package: Electrical and Layout Perspectives. - Lei He 001; Shauki Elassaad; Yiyu Shi 001; Yu Hu 002; Wei Yao 002 (Found. Trends Electron. Des. Autom., 2011)

Worst-Case Estimation for Data-Dependent Timing Jitter and Amplitude Noise in High-Speed Differential Link. - Wei Yao 002; Yiyu Shi 001; Lei He 001; Sudhakar Pamarti (IEEE Trans. Very Large Scale Integr. Syst., 2012)

Modeling and Application of Multi-Port TSV Networks in 3-D IC. - Wei Yao 002; Siming Pan; Brice Achkir; Jun Fan 001; Lei He 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013)