Software-Hardware Co-Optimization on Partial-Sum Problem for PIM-based Neural Network Accelerator. - Qizhe Wu; Linfeng Tao; Huawen Liang; Wei Yuan 006; Teng Tian; Shuang Xue; Xi Jin 002 (HPEC, 2021)

A Gather Accelerator for GNNs on FPGA Platform. - Wei Yuan 006; Teng Tian; Huawen Liang; Xi Jin 002 (ICPADS, 2021)

Hardware Acceleration of Sampling Algorithms in Sample and Aggregate Graph Neural Networks. - Yuchen Gui; Boyi Wei; Wei Yuan 006; Xi Jin 002 (CoRR, 2022)

FP-GNN: Adaptive FPGA accelerator for Graph Neural Networks. - Teng Tian; Letian Zhao; Xiaotian Wang; Qizhe Wu; Wei Yuan 006; Xi Jin 002 (Future Gener. Comput. Syst., 2022)

QEGCN: An FPGA-based accelerator for quantized GCNs with edge-level parallelism. - Wei Yuan 006; Teng Tian; Qizhe Wu; Xi Jin 002 (J. Syst. Archit., 2022)

A FPGA-HBM-Based Hardware Streaming Accelerator for GNN Sampling. - Yuchen Gui; Qizhe Wu; Wei Yuan 006; Huawen Liang; Xiaotian Wang; Xi Jin 002 (ASAP, 2024)

RingTK: A Ring, Parallel and High Performance Top-K Sorter on FPGA. - Huawen Liang; Qizhe Wu; Wei Yuan 006; Teng Tian; Xi Jin 002 (FCCM, 2024)

HBM-Based Hardware Accelerator for GNN Sampling and Aggregation. - Yuchen Gui; Qizhe Wu; Wei Yuan 006; Huawen Liang; Xiaotian Wang; Xi Jin 002 (HPEC, 2024)

Exploring the Performance Improvement of Tensor Processing Engines through Transformation in the Bit-weight Dimension of MACs. - Qizhe Wu; Huawen Liang; Yuchen Gui; Zhichen Zeng 002; Zerong He; Linfeng Tao; Xiaotian Wang; Letian Zhao; Zhaoxi Zeng; Wei Yuan 006; Wei Wu; Xi Jin 002 (HPCA, 2025)

GHVSA: Graph-based high-dimensional vector search accelerator. - Wei Yuan 006; Huawen Liang; Xi Jin 002 (J. Syst. Archit., 2025)

FANNS: An FPGA-Based Approximate Nearest-Neighbor Search Accelerator. - Wei Yuan 006; Xi Jin 002 (IEEE Trans. Very Large Scale Integr. Syst., 2025)