Power-Safe Application of Transition Delay Fault Patterns Considering Current Limit during Wafer Test. - Wei Zhao 010; Junxia Ma; Mohammad Tehranipoor; Sreejit Chakravarty (Asian Test Symposium, 2010)

Analysis of power consumption and transition fault coverage for LOS and LOC testing schemes. - Fangmei Wu; Luigi Dilillo; Alberto Bosio; Patrick Girard 001; Serge Pravossoudovitch; Arnaud Virazel; Junxia Ma; Wei Zhao 010; Mohammad Tehranipoor; Xiaoqing Wen (DDECS, 2010)

Peak power identification on power bumps during test application. - Wei Zhao 010; Mohammad Tehranipoor (IGCC, 2011)

Power-safe test application using an effective gating approach considering current limits. - Wei Zhao 010; Mohammad Tehranipoor; Sreejit Chakravarty (VTS, 2011)

PowerMAX: Fast Power Analysis during Test. - Wei Zhao 010; Mohammad Tehranipoor (Asian Test Symposium, 2012)

A novel method for fast identification of peak current during test. - Wei Zhao 010; Sreejit Chakravarty; Junxia Ma; Narendra Devta-Prasanna; Fan Yang 060; Mohammad Tehranipoor (VTS, 2012)

Layout-Aware Pattern Evaluation and Analysis for Power-Safe Application of Transition Delay Fault Patterns. - Hassan Salmani; Wei Zhao 010; Mohammad Tehranipoor; Sreejit Chakravarty; Patrick Girard 001; Xiaoqing Wen (J. Low Power Electron., 2012)

Ensuring Power-Safe Application of Test Patterns Using an Effective Gating Approach Considering Current Limits. - Wei Zhao 010; Mohammad Tehranipoor; Sreejit Chakravarty (J. Low Power Electron., 2012)

Power-safe application of tdf patterns to flip-chip designs during wafer test. - Wei Zhao 010; Junxia Ma; Mohammad Tehranipoor; Sreejit Chakravarty (ACM Trans. Design Autom. Electr. Syst., 2013)

A Survey of Test and Reliability Solutions for Magnetic Random Access Memories. - Patrick Girard 001; Yuanqing Cheng; Arnaud Virazel; Wei Zhao 010; Rajendra Bishnoi; Mehdi B. Tahoori (Proc. IEEE, 2021)