Designing Optimized Topologies for On-Chip Massive Data Communication. - Weifeng Liu 005; Linping Wu; Xiaowen Xu; Meng Guo 004 (HPCC/DSS/SmartCity, 2020)

Topology Aware Algorithm for Two-Phase I/O in Clusters With Tapered Hierarchical Networks. - Weifeng Liu 005; Linping Wu; Xiaowen Xu (IEEE Access, 2020)

Implementing Performance Portability of High Performance Computing Programs in the New Golden Age of Chip Architecture. - Weifeng Liu 005; Linping Wu; Xiaowen Xu; Yuren Wang (CoRR, 2023)