QCA Systolic Matrix Multiplier. - Liang Lu; Weiqiang Liu 001; Máire O'Neill; Earl E. Swartzlander Jr. (ISVLSI, 2010)

Design rules for Quantum-dot Cellular Automata. - Weiqiang Liu 001; Liang Lu; Máire O'Neill; Earl E. Swartzlander Jr. (ISCAS, 2011)

A review of QCA adders and metrics. - Weiqiang Liu 001; Máire O'Neill; Earl E. Swartzlander Jr. (ACSCC, 2012)

Cost-efficient decimal adder design in Quantum-dot cellular automata. - Weiqiang Liu 001; Liang Lu; Máire O'Neill; Earl E. Swartzlander Jr. (ISCAS, 2012)

Power analysis attack of QCA circuits: A case study of the Serpent cipher. - Weiqiang Liu 001; Saket Srivastava; Liang Lu; Máire O'Neill; Earl E. Swartzlander Jr. (ISCAS, 2013)

QCA Systolic Array Design. - Liang Lu; Weiqiang Liu 001; Máire O'Neill; Earl E. Swartzlander Jr. (IEEE Trans. Computers, 2013)

Security Issues in QCA Circuit Design - Power Analysis Attacks. - Weiqiang Liu 001; Saket Srivastava; Máire O'Neill; Earl E. Swartzlander Jr. (Field-Coupled Nanocomputing, 2014)

Design of Approximate Unsigned Integer Non-restoring Divider for Inexact Computing. - Linbin Chen; Jie Han 001; Weiqiang Liu 001; Fabrizio Lombardi (ACM Great Lakes Symposium on VLSI, 2015)

RO PUF design in FPGAs with new comparison strategies. - Weiqiang Liu 001; Yifei Yu; Chenghua Wang; Yijun Cui; Máire O'Neill (ISCAS, 2015)

Design of 3-D quantum-dot cellular automata adders. - Weiqiang Liu 001; Earl E. Swartzlander Jr. (IEICE Electron. Express, 2015)

Improving RO PUF design using frequency distribution characteristics. - Yifei Yu; Chenghua Wang; Weiqiang Liu 001; Yijun Cui; Máire O'Neill (IEICE Electron. Express, 2015)

A Parallel Decimal Multiplier Using Hybrid Binary Coded Decimal (BCD) Codes. - Xiao-Ping Cui; Weiqiang Liu 001; Dong Wenwen; Fabrizio Lombardi (ARITH, 2016)

Live demonstration: An automatic evaluation platform for physical unclonable function test. - Yijun Cui; Chenghua Wang; Weiqiang Liu 001; Máire O'Neill (ISCAS, 2016)

Low-cost configurable ring oscillator PUF with improved uniqueness. - Yijun Cui; Chenghua Wang; Weiqiang Liu 001; Yifei Yu; Máire O'Neill; Fabrizio Lombardi (ISCAS, 2016)

Design and evaluation of an approximate Wallace-Booth multiplier. - Liangyu Qian; Chenghua Wang; Weiqiang Liu 001; Fabrizio Lombardi; Jie Han 001 (ISCAS, 2016)

Design and Performance Evaluation of Approximate Floating-Point Multipliers. - Peipei Yin; Chenghua Wang; Weiqiang Liu 001; Fabrizio Lombardi (ISVLSI, 2016)

Design of approximate Redundant Binary multipliers. - Tian Cao 005; Weiqiang Liu 001; Chenghua Wang; Xiao-Ping Cui; Fabrizio Lombardi (NANOARCH, 2016)

A fully parallel approximate CORDIC design. - Linbin Chen; Fabrizio Lombardi; Jie Han 001; Weiqiang Liu 001 (NANOARCH, 2016)

A Reconfigurable Memory PUF Based on Tristate Inverter Arrays. - Yijun Cui; Chenghua Wang; Weiqiang Liu 001; Máire O'Neill (SiPS, 2016)

On the Design of Approximate Restoring Dividers for Error-Tolerant Applications. - Linbin Chen; Jie Han 001; Weiqiang Liu 001; Fabrizio Lombardi (IEEE Trans. Computers, 2016)

A Modified Partial Product Generator for Redundant Binary Multipliers. - Xiao-Ping Cui; Weiqiang Liu 001; Xin Chen 039; Earl E. Swartzlander Jr.; Fabrizio Lombardi (IEEE Trans. Computers, 2016)

Design and Analysis of Inexact Floating-Point Adders. - Weiqiang Liu 001; Linbin Chen; Chenghua Wang; Máire O'Neill; Fabrizio Lombardi (IEEE Trans. Computers, 2016)

Multiprecision Multiplication on ARMv8. - Zhe Liu 001; Kimmo Järvinen 001; Weiqiang Liu 001; Hwajeong Seo (ARITH, 2017)

DC MUX PUF: A highly reliable feed-back MUX PUF based on measuring duty cycle. - Yunhao Xu; Yingjie Lao; Weiqiang Liu 001; Xiaohu You 001; Chuan Zhang 001 (ASICON, 2017)

Design of Approximate High-Radix Dividers by Inexact Binary Signed-Digit Addition. - Linbin Chen; Fabrizio Lombardi; Paolo Montuschi; Jie Han 001; Weiqiang Liu 001 (ACM Great Lakes Symposium on VLSI, 2017)

Design of Approximate Logarithmic Multipliers. - Weiqiang Liu 001; Jiahua Xu 001; Danye Wang; Fabrizio Lombardi (ACM Great Lakes Symposium on VLSI, 2017)

XOR gate based low-cost configurable RO PUF. - Lei Zhang 089; Chenghua Wang; Weiqiang Liu 001; Máire O'Neill; Fabrizio Lombardi (ISCAS, 2017)

Design and operational assessment of an intra-cell hybrid L2 cache. - Linbin Chen; Jie Han 001; Weiqiang Liu 001; Fabrizio Lombardi (NANOARCH, 2017)

High Performance Parallel Decimal Multipliers Using Hybrid BCD Codes. - Xiao-Ping Cui; Wenwen Dong; Weiqiang Liu 001; Earl E. Swartzlander Jr.; Fabrizio Lombardi (IEEE Trans. Computers, 2017)

Design of Approximate Radix-4 Booth Multipliers for Error-Tolerant Computing. - Weiqiang Liu 001; Liangyu Qian; Chenghua Wang; Honglan Jiang; Jie Han 001; Fabrizio Lombardi (IEEE Trans. Computers, 2017)

Guest Editorial: Introduction to the Special Issue on Emerging Technologies and Designs for Application-Specific Computing. - Weiqiang Liu 001; Earl E. Swartzlander Jr.; Máire O'Neill (IEEE Trans. Emerg. Top. Comput., 2017)

Algorithm and Design of a Fully Parallel Approximate Coordinate Rotation Digital Computer (CORDIC). - Linbin Chen; Jie Han 001; Weiqiang Liu 001; Fabrizio Lombardi (IEEE Trans. Multi Scale Comput. Syst., 2017)

Approximate Computing and Its Application to Hardware Security. - Weiqiang Liu 001; Chongyan Gu; Gang Qu 001; Máire O'Neill (Cyber-Physical Systems Security, 2018)

Lightweight Hardware Implementation of R-LWE Lattice-Based Cryptography. - Sailong Fan; Weiqiang Liu 001; James Howe; Ayesha Khalid; Máire O'Neill (APCCAS, 2018)

Attacking Arbiter PUFs Using Various Modeling Attack Algorithms: A Comparative Study. - Yue Fang; Chenghua Wang; Qingqing Ma; Chongyan Gu; Máire O'Neill; Weiqiang Liu 001 (APCCAS, 2018)

Error Samplers for Lattice-Based Cryptography -Challenges, Vulnerabilities and Solutions. - Ayesha Khalid; Ciara Rafferty; James Howe; Séamus Brannigan; Weiqiang Liu 001; Máire O'Neill (APCCAS, 2018)

Combining Restoring Array and Logarithmic Dividers into an Approximate Hybrid Design. - Weiqiang Liu 001; Jing Li 117; Tao Xu; Chenghua Wang; Paolo Montuschi; Fabrizio Lombardi (ARITH, 2018)

A machine learning attack resistant multi-PUF design on FPGA. - Qingqing Ma; Chongyan Gu; Neil Hanley; Chenghua Wang; Weiqiang Liu 001; Máire O'Neill (ASP-DAC, 2018)

Design of Dynamic Range Approximate Logarithmic Multipliers. - Peipei Yin; Chenghua Wang; Weiqiang Liu 001; Fabrizio Lombardi (ACM Great Lakes Symposium on VLSI, 2018)

Modelling Attack Analysis of Configurable Ring Oscillator (CRO) PUF Designs. - Jack Miskelly; Chongyan Gu; Qingqing Ma; Yijun Cui; Weiqiang Liu 001; Máire O'Neill (DSP, 2018)

Design Exploration of Small Bit-Width Multipliers Using Approximate Logic Design (ALD) Tool. - Haroon Waris; Weiqiang Liu 001; Pengfei Huang; Ruizhe Ma; Chenghua Wang; Fabrizio Lombardi (DSP, 2018)

Design and Application of an Approximate 2-D Convolver with Error Compensation. - Ke Chen 018; Jie Han 001; Paolo Montuschi; Weiqiang Liu 001; Fabrizio Lombardi (ISCAS, 2018)

Design of Approximate FFT with Bit-width Selection Algorithms. - Qicong Liao; Weiqiang Liu 001; Fei Qiao; Chenghua Wang; Fabrizio Lombardi (ISCAS, 2018)

Design and Optimization of Modular Multiplication for SIDH. - Chunyang Liu; Jian Ni; Weiqiang Liu 001; Zhe Liu 001; Máire O'Neill (ISCAS, 2018)

Design of Majority Logic (ML) Based Approximate Full Adders. - Tingting Zhang; Weiqiang Liu 001; Emma McLarnon; Máire O'Neill; Fabrizio Lombardi (ISCAS, 2018)

A Hardware/Software Co-design Method for Approximate Semi-Supervised K-Means Clustering. - Pengfei Huang; Chenghua Wang; Ruizhe Ma; Weiqiang Liu 001; Fabrizio Lombardi (ISVLSI, 2018)

A Highly Flexible Lightweight and High Speed True Random Number Generator on FPGA. - Faqiang Mei; Lei Zhang 089; Chongyan Gu; Yuan Cao; Chenghua Wang; Weiqiang Liu 001 (ISVLSI, 2018)

A Probabilistic Error Model and Framework for Approximate Booth Multipliers. - Yuying Zhu 003; Weiqiang Liu 001; Jie Han 001; Fabrizio Lombardi (NANOARCH, 2018)

A Co-training Based Hardware Trojan Detection Technique by Exploiting Unlabeled ICs and Inaccurate Simulation Models. - Mingfu Xue; Rongzhen Bian; Jian Wang 038; Weiqiang Liu 001 (TrustCom/BigDataSE, 2018)

Ultra-Lightweight and Reconfigurable Tristate Inverter Based Physical Unclonable Function Design. - Yijun Cui; Chongyan Gu; Chenghua Wang; Máire O'Neill; Weiqiang Liu 001 (IEEE Access, 2018)

Design and Evaluation of Approximate Logarithmic Multipliers for Low Power Error-Tolerant Applications. - Weiqiang Liu 001; Jiahua Xu 001; Danye Wang; Chenghua Wang; Paolo Montuschi; Fabrizio Lombardi (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

Data Compression Device Based on Modified LZ4 Algorithm. - Weiqiang Liu 001; Faqiang Mei; Chenghua Wang; Máire O'Neill; Earl E. Swartzlander Jr. (IEEE Trans. Consumer Electron., 2018)

Design, Evaluation and Application of Approximate High-Radix Dividers. - Linbin Chen; Jie Han 001; Weiqiang Liu 001; Paolo Montuschi; Fabrizio Lombardi (IEEE Trans. Multi Scale Comput. Syst., 2018)

Design of High-Speed Wide-Word Hybrid Parallel-Prefix/Carry-Select and Skip Adders. - Xiao-Ping Cui; Weiqiang Liu 001; Shumin Wang; Earl E. Swartzlander Jr.; Fabrizio Lombardi (J. Signal Process. Syst., 2018)

Designs of Approximate Floating-Point Multipliers with Variable Accuracy for Error-Tolerant Applications. - Peipei Yin; Chenghua Wang; Weiqiang Liu 001; Earl E. Swartzlander Jr.; Fabrizio Lombardi (J. Signal Process. Syst., 2018)

A Modeling Attack Resistant Deception Technique for Securing PUF based Authentication. - Chongyan Gu; Chip-Hong Chang; Weiqiang Liu 001; Shichao Yu; Qingqing Ma; Máire O'Neill (AsianHOST, 2019)

Security Analysis and Modeling Attacks on Duty Cycle Multiplexer PUF. - Yunhao Xu; Yingjie Lao; Weiqiang Liu 001; Chuan Zhang 001 (ASICON, 2019)

A Large Scale Comprehensive Evaluation of Single-Slice Ring Oscillator and PicoPUF Bit Cells on 28nm Xilinx FPGAs. - Chongyan Gu; Chip-Hong Chang; Weiqiang Liu 001; Neil Hanley; Jack Miskelly; Máire O'Neill (ASHES@CCS, 2019)

INA: Incremental Network Approximation Algorithm for Limited Precision Deep Neural Networks. - Zheyu Liu; Kaige Jia; Weiqiang Liu 001; Qi Wei 001; Fei Qiao; Huazhong Yang (ICCAD, 2019)

Theoretical Analysis of Delay-Based PUFs and Design Strategies for Improvement. - Yale Wang; Chenghua Wang; Chongyan Gu; Yijun Cui; Máire O'Neill; Weiqiang Liu 001 (ISCAS, 2019)

Multi-Incentive Delay-Based (MID) PUF. - Zhengran Zhang; Chongyan Gu; Yijun Cui; Chuan Zhang 001; Máire O'Neill; Weiqiang Liu 001 (ISCAS, 2019)

An Improved Automatic Hardware Trojan Generation Platform. - Shichao Yu; Weiqiang Liu 001; Máire O'Neill (ISVLSI, 2019)

Design and Analysis of Majority Logic Based Approximate Radix-4 Booth Encoders. - Tingting Zhang; Weiqiang Liu 001; Jie Han 001; Fabrizio Lombardi (NANOARCH, 2019)

Dynamic Reconfigurable PUFs Based on FPGA. - Yijun Cui; Chenghua Wang; Yunpeng Chen; Ziwei Wei; Mengxian Chen; Weiqiang Liu 001 (SiPS, 2019)

Theoretical Analysis of Configurable RO PUFs and Strategies to Enhance Security. - Jiang Li 012; Hao Gao; Yijun Cui; Chenghua Wang; Yale Wang; Chongyan Gu; Weiqiang Liu 001 (SiPS, 2019)

Design and Evaluation of a Power-Efficient Approximate Systolic Array Architecture for Matrix Multiplication. - Haroon Waris; Chenghua Wang; Weiqiang Liu 001; Fabrizio Lombardi (SiPS, 2019)

Defeating Untrustworthy Testing Parties: A Novel Hybrid Clustering Ensemble Based Golden Models-Free Hardware Trojan Detection Method. - Mingfu Xue; Rongzhen Bian; Weiqiang Liu 001; Jian Wang 038 (IEEE Access, 2019)

Lattice-based Cryptography for IoT in A Quantum World: Are We Ready? - Ayesha Khalid; Sarah McCarthy; Weiqiang Liu 001; Máire O'Neill (IACR Cryptol. ePrint Arch., 2019)

High-performance approximate half and full adder cells using NAND logic gate. - Haroon Waris; Chenghua Wang; Weiqiang Liu 001 (IEICE Electron. Express, 2019)

Building an accurate hardware Trojan detection technique from inaccurate simulation models and unlabelled ICs. - Mingfu Xue; Rongzhen Bian; Jian Wang 038; Weiqiang Liu 001 (IET Comput. Digit. Tech., 2019)

A Theoretical Model to Link Uniqueness and Min-Entropy for PUF Evaluations. - Chongyan Gu; Weiqiang Liu 001; Neil Hanley; Robert Hesselbarth; Máire O'Neill (IEEE Trans. Computers, 2019)

Design and Analysis of Approximate Redundant Binary Multipliers. - Weiqiang Liu 001; Tian Cao 005; Peipei Yin; Yuying Zhu 003; Chenghua Wang; Earl E. Swartzlander Jr.; Fabrizio Lombardi (IEEE Trans. Computers, 2019)

Optimized Modular Multiplication for Supersingular Isogeny Diffie-Hellman. - Weiqiang Liu 001; Jian Ni; Zhe Liu 001; Chunyang Liu; Máire O'Neill (IEEE Trans. Computers, 2019)

Approximate Designs for Fast Fourier Transform (FFT) With Application to Speech Recognition. - Weiqiang Liu 001; Qicong Liao; Fei Qiao; Weijie Xia; Chenghua Wang; Fabrizio Lombardi (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

New Majority Gate-Based Parallel BCD Adder Designs for Quantum-Dot Cellular Automata. - Tingting Zhang; Vikramkumar Pudi; Weiqiang Liu 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2019)

XOR-Based Low-Cost Reconfigurable PUFs for IoT Security. - Weiqiang Liu 001; Lei Zhang 089; Zhengran Zhang; Chongyan Gu; Chenghua Wang; Máire O'Neill; Fabrizio Lombardi (ACM Trans. Embed. Comput. Syst., 2019)

Optimized Schoolbook Polynomial Multiplication for Compact Lattice-Based Cryptography on FPGA. - Weiqiang Liu 001; Sailong Fan; Ayesha Khalid; Ciara Rafferty; Máire O'Neill (IEEE Trans. Very Large Scale Integr. Syst., 2019)

Embedding Backdoors as the Facial Features: Invisible Backdoor Attacks Against Face Recognition Systems. - Can He; Mingfu Xue; Jian Wang 038; Weiqiang Liu 001 (ACM TUR-C, 2020)

An Efficient Hardware Generator for Massive Non-Stationary Fading Channels. - Zikun Zhao; Qiuming Zhu; Kai Mao; Weiqiang Liu 001; Ning Li 012; Shuangyi Yan; Wei Huang (GLOBECOM (Workshops), 2020)

Security Analysis of Hardware Trojans on Approximate Circuits. - Yuqin Dou; Shichao Yu; Chongyan Gu; Máire O'Neill; Chenghua Wang; Weiqiang Liu 001 (ACM Great Lakes Symposium on VLSI, 2020)

Programmable Ring Oscillator PUF Based on Switch Matrix. - Yijun Cui; Yunpeng Chen; Chenghua Wang; Chongyan Gu; Máire O'Neill; Weiqiang Liu 001 (ISCAS, 2020)

Design and Implementation of an Approximate Softmax Layer for Deep Neural Networks. - Yue Gao; Weiqiang Liu 001; Fabrizio Lombardi (ISCAS, 2020)

AxMM: Area and Power Efficient Approximate Modular Multiplier for R-LWE Cryptosystem. - Dur-e-Shahwar Kundi; Song Bian 001; Ayesha Khalid; Chenghua Wang; Máire O'Neill; Weiqiang Liu 001 (ISCAS, 2020)

DC-LSTM: Deep Compressed LSTM with Low Bit-Width and Structured Matrices. - Guocai Nan; Chenghua Wang; Weiqiang Liu 001; Fabrizio Lombardi (ISCAS, 2020)

A Novel Feature Extraction Strategy for Hardware Trojan Detection. - Shichao Yu; Chongyan Gu; Weiqiang Liu 001; Máire O'Neill (ISCAS, 2020)

Transformer PUF : A Highly Flexible Configurable RO PUF Based on FPGA. - Ziwei Wei; Yijun Cui; Yunpeng Chen; Chenghua Wang; Chongyan Gu; Weiqiang Liu 001 (SiPS, 2020)

Active DNN IP Protection: A Novel User Fingerprint Management and DNN Authorization Control Technique. - Mingfu Xue; Zhiyu Wu; Can He; Jian Wang 038; Weiqiang Liu 001 (TrustCom, 2020)

Machine Learning Security: Threats, Countermeasures, and Evaluations. - Mingfu Xue; Chengxiang Yuan; Heyi Wu; Yushu Zhang 001; Weiqiang Liu 001 (IEEE Access, 2020)

LOPA: A linear offset based poisoning attack method against adaptive fingerprint authentication system. - Mingfu Xue; Can He; Jian Wang 038; Weiqiang Liu 001 (Comput. Secur., 2020)

DNN Intellectual Property Protection: Taxonomy, Methods, Attack Resistance, and Evaluations. - Mingfu Xue; Can He; Jian Wang 038; Weiqiang Liu 001 (CoRR, 2020)

Robust and Natural Physical Adversarial Examples for Object Detectors. - Mingfu Xue; Chengxiang Yuan; Can He; Jian Wang 038; Weiqiang Liu 001 (CoRR, 2020)

Use the Spear as a Shield: A Novel Adversarial Example based Privacy-Preserving Technique against Membership Inference Attacks. - Mingfu Xue; Chengxiang Yuan; Can He; Zhiyu Wu; Yushu Zhang 001; Zhe Liu 001; Weiqiang Liu 001 (CoRR, 2020)

3D Invisible Cloak. - Mingfu Xue; Can He; Zhiyu Wu; Jian Wang 038; Zhe Liu 001; Weiqiang Liu 001 (CoRR, 2020)

Design, evaluation and application of approximate-truncated Booth multipliers. - Yuying Zhu 003; Weiqiang Liu 001; Peipei Yin; Tian Cao 005; Jie Han 001; Fabrizio Lombardi (IET Circuits Devices Syst., 2020)

Ten years of hardware Trojans: a survey from the attacker's perspective. - Mingfu Xue; Chongyan Gu; Weiqiang Liu 001; Shichao Yu; Máire O'Neill (IET Comput. Digit. Tech., 2020)

Security in Approximate Computing and Approximate Computing for Security: Challenges and Opportunities. - Weiqiang Liu 001; Chongyan Gu; Máire O'Neill; Gang Qu 001; Paolo Montuschi; Fabrizio Lombardi (Proc. IEEE, 2020)

Scanning the Issue. - Weiqiang Liu 001; Maximilian John; Andreas Karrenbauer; Adam Allerhand; Fabrizio Lombardi; Michael Shulte; David J. Miller 001; Zhen Xiang; George Kesidis; Antti Oulasvirta; Niraj Ramesh Dayama; Morteza Shiripour (Proc. IEEE, 2020)

A Retrospective and Prospective View of Approximate Computing [Point of View\

Approximate Computing: From Circuits to Applications [Scanning the Issue]. - Weiqiang Liu 001; Fabrizio Lombardi; Michael J. Schulte (Proc. IEEE, 2020)

DPAEG: A Dependency Parse-Based Adversarial Examples Generation Method for Intelligent Q&A Robots. - Mingfu Xue; Chengxiang Yuan; Jian Wang 038; Weiqiang Liu 001 (Secur. Commun. Networks, 2020)

High Performance Modular Multiplication for SIDH. - Weiqiang Liu 001; Ziying Ni; Jian Ni; Ciara Rafferty; Máire O'Neill (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Mathematical Modeling Analysis of Strong Physical Unclonable Functions. - Yunhao Xu; Yingjie Lao; Weiqiang Liu 001; Zaichen Zhang; Xiaohu You 001; Chuan Zhang 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Profile-Based Output Error Compensation for Approximate Arithmetic Circuits. - Ke Chen 018; Weiqiang Liu 001; Jie Han 001; Fabrizio Lombardi (IEEE Trans. Circuits Syst., 2020)

Resource-Shared Crypto-Coprocessor of AES Enc/Dec With SHA-3. - Dur-e-Shahwar Kundi; Ayesha Khalid; Arshad Aziz; Chenghua Wang; Máire O'Neill; Weiqiang Liu 001 (IEEE Trans. Circuits Syst., 2020)

Hybrid Low Radix Encoding-Based Approximate Booth Multipliers. - Haroon Waris; Chenghua Wang; Weiqiang Liu 001 (IEEE Trans. Circuits Syst., 2020)

An Efficient and Parallel R-LWE Cryptoprocessor. - Yuqing Zhang; Chenghua Wang; Dur-e-Shahwar Kundi; Ayesha Khalid; Máire O'Neill; Weiqiang Liu 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2020)

Guest Editorial: Introduction to the Special Section on Cyber Security Threats and Defense Advance. - Zhe Liu 001; Kim-Kwang Raymond Choo; Weiqiang Liu 001; Muhammad Khurram Khan (IEEE Trans. Emerg. Top. Comput., 2020)

Background Calibration of Bit Weights in Pipelined-SAR ADCs Using Paired Comparators. - Jie Sun 020; Minglei Zhang; Lei Qiu 002; Jianhui Wu 001; Weiqiang Liu 001 (IEEE Trans. Very Large Scale Integr. Syst., 2020)

GOMIL: Global Optimization of Multiplier by Integer Linear Programming. - Weihua Xiao; Weikang Qian; Weiqiang Liu 001 (DATE, 2021)

DNN Intellectual Property Protection: Taxonomy, Attacks and Evaluations (Invited Paper). - Mingfu Xue; Jian Wang 038; Weiqiang Liu 001 (ACM Great Lakes Symposium on VLSI, 2021)

A 10-b 500MS/s Partially Loop-Unrolled SAR ADC with a Comparator Offset Calibration Technique. - Chao Chen; Jie Sun 020; Chenghua Wang; Weiqiang Liu 001 (ISCAS, 2021)

High-Performance Systolic Array Montgomery Multiplier for SIKE. - Ziying Ni; Dur-e-Shahwar Kundi; Máire O'Neill; Weiqiang Liu 001 (ISCAS, 2021)

A 2-Then-1 Bit/Cycle Asynchronous SAR ADC with Background Offset Calibration. - Jie Sun 020; Jun Huang; Jianhui Wu 001; Weiqiang Liu 001 (ISCAS, 2021)

Towards CRYSTALS-Kyber: A M-LWE Cryptoprocessor with Area-Time Trade-Off. - Kan Yao; Dur-e-Shahwar Kundi; Chenghua Wang; Máire O'Neill; Weiqiang Liu 001 (ISCAS, 2021)

A Dynamic Highly Reliable SRAM-Based PUF Retaining Memory Function. - Hu Zhang; Chenghua Wang; Chenggang Yan 002; Yijun Cui; Chongyan Gu; Máire O'Neill; Weiqiang Liu 001 (ISCAS, 2021)

Design of An Approximate FFT Processor Based on Approximate Complex Multipliers. - Jinhe Du; Ke Chen 018; Peipei Yin; Chenggang Yan 002; Weiqiang Liu 001 (ISVLSI, 2021)

Detect and Remove Watermark in Deep Neural Networks via Generative Adversarial Networks. - Shichang Sun; Haoqi Wang; Mingfu Xue; Yushu Zhang 001; Jian Wang 038; Weiqiang Liu 001 (ISC, 2021)

Dynamically Configurable Physical Unclonable Function based on RRAM Crossbar. - Jiang Li 012; Yijun Cui; Chongyan Gu; Chenghua Wang; Weiqiang Liu 001 (NANOARCH, 2021)

Robust Backdoor Attacks against Deep Neural Networks in Real Physical World. - Mingfu Xue; Can He; Shichang Sun; Jian Wang 038; Weiqiang Liu 001 (TrustCom, 2021)

ActiveGuard: An Active DNN IP Protection Technique via Adversarial Examples. - Mingfu Xue; Shichang Sun; Can He; Yushu Zhang 001; Jian Wang 038; Weiqiang Liu 001 (CoRR, 2021)

Protecting the Intellectual Properties of Deep Neural Networks with an Additional Class and Steganographic Images. - Shichang Sun; Mingfu Xue; Jian Wang 038; Weiqiang Liu 001 (CoRR, 2021)

Protect the Intellectual Property of Dataset against Unauthorized Use. - Mingfu Xue; Yinghao Wu; Yushu Zhang 001; Jian Wang 038; Weiqiang Liu 001 (CoRR, 2021)

SocialGuard: An adversarial example based privacy-preserving technique for social images. - Mingfu Xue; Shichang Sun; Zhiyu Wu; Can He; Jian Wang 038; Weiqiang Liu 001 (J. Inf. Secur. Appl., 2021)

NaturalAE: Natural and robust physical adversarial examples for object detectors. - Mingfu Xue; Chengxiang Yuan; Can He; Jian Wang 038; Weiqiang Liu 001 (J. Inf. Secur. Appl., 2021)

A large-scale comprehensive evaluation of single-slice ring oscillator and PicoPUF bit cells on 28-nm Xilinx FPGAs. - Chongyan Gu; Chip-Hong Chang; Weiqiang Liu 001; Neil Hanley; Jack Miskelly; Máire O'Neill (J. Cryptogr. Eng., 2021)

A lightweight key renewal scheme based authentication protocol with configurable RO PUF for clustered sensor networks. - Yijun Cui; Jiang Li 012; Chenghua Wang; Chongyan Gu; Weiqiang Liu 001 (Microelectron. J., 2021)

A Hardware/Software Co-Design Methodology for Adaptive Approximate Computing in clustering and ANN Learning. - Pengfei Huang; Chenghua Wang; Weiqiang Liu 001; Fei Qiao; Fabrizio Lombardi (IEEE Open J. Comput. Soc., 2021)

Backdoors hidden in facial features: a novel invisible backdoor attack against face recognition systems. - Mingfu Xue; Can He; Jian Wang 038; Weiqiang Liu 001 (Peer-to-Peer Netw. Appl., 2021)

A Modeling Attack Resistant Deception Technique for Securing Lightweight-PUF-Based Authentication. - Chongyan Gu; Chip-Hong Chang; Weiqiang Liu 001; Shichao Yu; Yale Wang; Máire O'Neill (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

Stochastic Dividers for Low Latency Neural Networks. - Shanshan Liu 001; Xiaochen Tang; Farzad Niknia; Pedro Reviriego; Weiqiang Liu 001; Ahmed Louri; Fabrizio Lombardi (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

An Energy Efficient Accelerator for Bidirectional Recurrent Neural Networks (BiRNNs) Using Hybrid-Iterative Compression With Error Sensitivity. - Guocai Nan; Zhengkuan Wang; Chenghua Wang; Bi Wu; Zhican Wang; Weiqiang Liu 001; Fabrizio Lombardi (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

High Performance CNN Accelerators Based on Hardware and Algorithm Co-Optimization. - Tian Yuan; Weiqiang Liu 001; Jie Han 001; Fabrizio Lombardi (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

A Real-Time Hardware Emulator for 3D Non-Stationary U2V Channels. - Qiuming Zhu; Zikun Zhao; Kai Mao; Xiaomin Chen; Weiqiang Liu 001; Qihui Wu 001 (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

BCD Adder Designs Based on Three-Input XOR and Majority Gates. - Zhufei Chu; Zeqiang Li; Yinshui Xia; Lunyao Wang; Weiqiang Liu 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

Background Calibration for Bit Weights in Pipelined ADCs Using Adaptive Dither Windows. - Jie Sun 020; Xin Ding 003; Chenggang Yan 002; Weiqiang Liu 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

AxBMs: Approximate Radix-8 Booth Multipliers for High-Performance FPGA-Based Accelerators. - Haroon Waris; Chenghua Wang; Weiqiang Liu 001; Fabrizio Lombardi (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

A Flip-Flop Based Arbiter Physical Unclonable Function (APUF) Design with High Entropy and Uniqueness for FPGA Implementation. - Chongyan Gu; Weiqiang Liu 001; Yijun Cui; Neil Hanley; Máire O'Neill; Fabrizio Lombardi (IEEE Trans. Emerg. Top. Comput., 2021)

Reduced Precision Redundancy for Reliable Processing of Data. - Shanshan Liu 001; Ke Chen 018; Pedro Reviriego; Weiqiang Liu 001; Ahmed Louri; Fabrizio Lombardi (IEEE Trans. Emerg. Top. Comput., 2021)

Design and Analysis of Majority Logic-Based Approximate Adders and Multipliers. - Weiqiang Liu 001; Tingting Zhang; Emma McLarnon; Máire O'Neill; Paolo Montuschi; Fabrizio Lombardi (IEEE Trans. Emerg. Top. Comput., 2021)

APAS: Application-Specific Accelerators for RLWE-Based Homomorphic Linear Transformations. - Song Bian 001; Dur-e-Shahwar Kundi; Kazuma Hirozawa; Weiqiang Liu 001; Takashi Sato 001 (IEEE Trans. Inf. Forensics Secur., 2021)

Design and Analysis of Energy-Efficient Dynamic Range Approximate Logarithmic Multipliers for Machine Learning. - Peipei Yin; Chenghua Wang; Haroon Waris; Weiqiang Liu 001; Yinhe Han 001; Fabrizio Lombardi (IEEE Trans. Sustain. Comput., 2021)

An Efficient High SFDR PDDS Using High-Pass-Shaped Phase Dithering. - Chenggang Yan 002; Jie Sun 020; Weiqiang Liu 001 (IEEE Trans. Very Large Scale Integr. Syst., 2021)

AxSA: On the Design of High-Performance and Power-Efficient Approximate Systolic Arrays for Matrix Multiplication. - Haroon Waris; Chenghua Wang; Weiqiang Liu 001; Fabrizio Lombardi (J. Signal Process. Syst., 2021)

Approximate Arithmetic Circuits: Design and Applications. - Ke Chen 018; Weiqiang Liu 001; Fabrizio Lombardi (Approximate Computing, 2022)

Security Vulnerabilities and Countermeasures for Approximate Circuits. - Chongyan Gu; Yuqin Dou; Weiqiang Liu 001; Máire O'Neill (Approximate Computing, 2022)

Approximate Computing for Cryptography. - Dur-e-Shahwar Kundi; Ayesha Khalid; Song Bian 001; Weiqiang Liu 001 (Approximate Computing, 2022)

An Automated Logic-Level Framework for Approximate Modular Arithmetic Circuits. - Haroon Waris; Chenghua Wang; Weiqiang Liu 001 (Approximate Computing, 2022)

Majority Logic-Based Approximate Multipliers for Error-Tolerant Applications. - Tingting Zhang; Honglan Jiang; Weiqiang Liu 001; Fabrizio Lombardi; Leibo Liu; Seok-Bum Ko; Jie Han 001 (Approximate Computing, 2022)

Sample-Specific Backdoor based Active Intellectual Property Protection for Deep Neural Networks. - Yinghao Wu; Mingfu Xue; Dujuan Gu; Yushu Zhang 001; Weiqiang Liu 001 (AICAS, 2022)

An Energy-Efficient Approximate Floating-Point Multipliers for Wireless Communications. - Jipeng Ge; Chenggang Yan 002; Xuan Zhao; Ke Chen 018; Bi Wu; Weiqiang Liu 001 (APCCAS, 2022)

Better Security Estimates for Approximate, IoT-Friendly R-LWE Cryptosystems. - Ruth O'Connor; Ayesha Khalid; Máire O'Neill; Weiqiang Liu 001 (APCCAS, 2022)

Lightweight and Efficient Hardware Implementation for Saber Using NTT Multiplication. - Tianyu Xu; Yijun Cui; Dongsheng Liu; Chenghua Wang; Weiqiang Liu 001 (APCCAS, 2022)

Design of Approximate Floating-point FFT with Mantissa Bit-width Adjustment Algorithm. - Xuan Zhao; Chenggang Yan 002; Chenghua Wang; Weiqiang Liu 001 (APCCAS, 2022)

PAxC: A Probabilistic-oriented Approximate Computing Methodology for ANNs. - Pengfei Huang; Chenghua Wang; Ke Chen 018; Weiqiang Liu 001 (DATE, 2022)

An Energy-efficient and High-precision Approximate MAC with Distributed Arithmetic Circuits. - Ziying Cui; Ke Chen 018; Bi Wu; Chenggang Yan 002; Weiqiang Liu 001 (ACM Great Lakes Symposium on VLSI, 2022)

Data Stream Oriented Fine-grained Sparse CNN Accelerator with Efficient Unstructured Pruning Strategy. - Tianyang Yu; Bi Wu; Ke Chen 018; Chenggang Yan 002; Weiqiang Liu 001 (ACM Great Lakes Symposium on VLSI, 2022)

Energy-efficient Oriented Approximate Quantization Scheme for Fine-Grained Sparse Neural Network Acceleration. - Tianyang Yu; Bi Wu; Ke Chen 018; Chenggang Yan 002; Weiqiang Liu 001 (ICCD, 2022)

Horizontal Correlation Analysis without Precise Location on Schoolbook Polynomial Multiplication of Lattice-based Cryptosystem. - Chuanchao Lu; Yijun Cui; Yang Li; Dur-e-Shahwar Kundi; Chenghua Wang; Weiqiang Liu 001 (ISCAS, 2022)

A Lightweight and Efficient Schoolbook Polynomial Multiplier for Saber. - Yuantuo Zhang; Yijun Cui; Ziying Ni; Dur-e-Shahwar Kundi; Dongsheng Liu; Weiqiang Liu 001 (ISCAS, 2022)

A High-Speed CNN Hardware Accelerator with Regular Pruning. - Yuan Song; Bi Wu; Tian Yuan; Weiqiang Liu 001 (ISQED, 2022)

Architectural-Space Exploration of Energy-Efficient Approximate Arithmetic Units for Error-Tolerant Applications. - Haroon Waris; Chenghua Wang; Weiqiang Liu 001 (ISVLSI, 2022)

Low-cost stochastic number generator based on MRAM for stochastic computing. - You Wang 002; Bi Wu; Hao Cai 001; Weiqiang Liu 001 (NANOARCH, 2022)

High-performance STT-MRAM Logic-in-Memory Scheme Utilizing Data Read Features. - Kai Liu; Bi Wu; Haonan Zhu; Weiqiang Liu 001 (NANOARCH, 2022)

HEADiv: A High-accuracy Energy-efficient Approximate Divider with Error Compensation. - Hanghang Wang; Ke Chen 018; Bi Wu; Chenghua Wang; Weiqiang Liu 001; Fabrizio Lombardi (NANOARCH, 2022)

Capacity-oriented High-performance NV-TCAM Leveraging Hybrid MRAM Scheme. - Didi Zhang; Bi Wu; Haonan Zhu; Weiqiang Liu 001 (NANOARCH, 2022)

A Novel Combined Correlation Power Analysis (CPA) Attack on Schoolbook Polynomial Multiplication in Lattice-based Cryptosystems. - Chuanchao Lu; Yijun Cui; Ayesha Khalid; Chongyan Gu; Chenghua Wang; Weiqiang Liu 001 (SOCC, 2022)

Active intellectual property protection for deep neural networks through stealthy backdoor and users' identities authentication. - Mingfu Xue; Shichang Sun; Yushu Zhang 001; Jian Wang 038; Weiqiang Liu 001 (Appl. Intell., 2022)

PTB: Robust physical backdoor attacks against deep neural networks in real world. - Mingfu Xue; Can He; Yinghao Wu; Shichang Sun; Yushu Zhang 001; Jian Wang 038; Weiqiang Liu 001 (Comput. Secur., 2022)

Imperceptible and Multi-channel Backdoor Attack against Deep Neural Networks. - Mingfu Xue; Shifeng Ni; Yinghao Wu; Yushu Zhang 001; Jian Wang 038; Weiqiang Liu 001 (CoRR, 2022)

InFIP: An Explainable DNN Intellectual Property Protection Method based on Intrinsic Features. - Mingfu Xue; Xin Wang; Yinghao Wu; Shifeng Ni; Yushu Zhang 001; Weiqiang Liu 001 (CoRR, 2022)

Efficient Pipelining Exploration for A High-performance CRYSTALS-Kyber Accelerator. - Ziying Ni; Ayesha Khalid; Dur-e-Shahwar Kundi; Máire O'Neill; Weiqiang Liu 001 (IACR Cryptol. ePrint Arch., 2022)

AxRLWE: A Multilevel Approximate Ring-LWE Co-Processor for Lightweight IoT Applications. - Dur-e-Shahwar Kundi; Ayesha Khalid; Song Bian 001; Chenghua Wang; Máire O'Neill; Weiqiang Liu 001 (IEEE Internet Things J., 2022)

A survey of approximate arithmetic circuits and blocks. - Ke Chen 018; Peipei Yin; Weiqiang Liu 001; Fabrizio Lombardi (it Inf. Technol., 2022)

Intellectual Property Protection for Deep Learning Models: Taxonomy, Methods, Attacks, and Evaluations. - Mingfu Xue; Yushu Zhang 001; Jian Wang 038; Weiqiang Liu 001 (IEEE Trans. Artif. Intell., 2022)

More is Less: Domain-Specific Speech Recognition Microprocessor Using One-Dimensional Convolutional Recurrent Neural Network. - Bo Liu 019; Hao Cai 001; Zilong Zhang; Xiaoling Ding; Ziyu Wang; Yu Gong; Weiqiang Liu 001; Jinjiang Yang; Zhen Wang 019; Jun Yang 006 (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

Editorial Special Issue on Circuits and Systems for Emerging Computing Paradigms. - Shanshan Liu 001; Bi Wu; Ke Chen 018; Weiqiang Liu 001; Máire O'Neill; Fabrizio Lombardi (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

GBC: An Energy-Efficient LSTM Accelerator With Gating Units Level Balanced Compression Strategy. - Bi Wu; Zhengkuan Wang; Ke Chen 018; Chenggang Yan 002; Weiqiang Liu 001 (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

A High Performance SIKE Accelerator With High Frequency and Low Area-Time Product. - Ziying Ni; Dur-e-Shahwar Kundi; Máire O'Neill; Weiqiang Liu 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

One-to-N & N-to-One: Two Advanced Backdoor Attacks Against Deep Learning Models. - Mingfu Xue; Can He; Jian Wang 038; Weiqiang Liu 001 (IEEE Trans. Dependable Secur. Comput., 2022)

Ultra High-Speed Polynomial Multiplications for Lattice-Based Cryptography on FPGAs. - Dur-e-Shahwar Kundi; Yuqing Zhang; Chenghua Wang; Ayesha Khalid; Máire O'Neill; Weiqiang Liu 001 (IEEE Trans. Emerg. Top. Comput., 2022)

Design of Unsigned Approximate Hybrid Dividers Based on Restoring Array and Logarithmic Dividers. - Weiqiang Liu 001; Tao Xu; Jing Li 117; Chenghua Wang; Paolo Montuschi; Fabrizio Lombardi (IEEE Trans. Emerg. Top. Comput., 2022)

A Dynamically Configurable PUF and Dynamic Matching Authentication Protocol. - Yale Wang; Chenghua Wang; Chongyan Gu; Yijun Cui; Máire O'Neill; Weiqiang Liu 001 (IEEE Trans. Emerg. Top. Comput., 2022)

Hybrid Partial Product-Based High-Performance Approximate Recursive Multipliers. - Haroon Waris; Chenghua Wang; Weiqiang Liu 001; Jie Han 001; Fabrizio Lombardi (IEEE Trans. Emerg. Top. Comput., 2022)

AxRMs: Approximate Recursive Multipliers Using High-Performance Building Blocks. - Haroon Waris; Chenghua Wang; Chenyu Xu; Weiqiang Liu 001 (IEEE Trans. Emerg. Top. Comput., 2022)

Deep Learning-Based Hardware Trojan Detection With Block-Based Netlist Information Extraction. - Shichao Yu; Chongyan Gu; Weiqiang Liu 001; Máire O'Neill (IEEE Trans. Emerg. Top. Comput., 2022)

Efficient Design of Majority-Logic-Based Approximate Arithmetic Circuits. - Zhufei Chu; Chuanhe Shang; Tingting Zhang; Yinshui Xia; Lunyao Wang; Weiqiang Liu 001 (IEEE Trans. Very Large Scale Integr. Syst., 2022)

A High-Performance SIKE Hardware Accelerator. - Ziying Ni; Dur-e-Shahwar Kundi; Máire O'Neill; Weiqiang Liu 001 (IEEE Trans. Very Large Scale Integr. Syst., 2022)

A Generic Dynamic Responding Mechanism and Secure Authentication Protocol for Strong PUFs. - Yale Wang; Chenghua Wang; Chongyan Gu; Yijun Cui; Máire O'Neill; Weiqiang Liu 001 (IEEE Trans. Very Large Scale Integr. Syst., 2022)

An Efficient Hardware Accelerator of High-Speed NTT for CRYSTALS-Kyber Post-Quantum Cryptography. - Zhuoyao Zhang; Yijun Cui; Ziying Ni; Chenghua Wang; Weiqiang Liu 001 (ACSSC, 2023)

Processor based Intrinsic PUF Design for Approximate Computing: Faith or Reality? - Aditya Japa; Jiliang Zhang 002; Weiqiang Liu 001; Chongyan Gu (AsianHOST, 2023)

An Energy-efficient Approximate DCT Design for Image Processing (Invited). - Xu Wang; Ke Chen 018; Chenghua Wang; Weiqiang Liu 001 (ASICON, 2023)

Spice-Compatible Modeling of Double Barrier MTJ for Highly Reliable Circuits. - You Wang 002; Yefan Xu; Chaoyue Zhang; Yu Gong; Hao Cai 001; Weiqiang Liu 001 (ICTA, 2023)

High Performance and Hardware-Efficient Approximate BPF Decoder for Polar codes. - Yuxuan Cui; Chenggang Yan 002; Weiqiang Liu 001 (ISCAS, 2023)

Towards a Lightweight CRYSTALS-Kyber in FPGAs: an Ultra-lightweight BRAM-free NTT Core. - Ziying Ni; Ayesha Khalid; Weiqiang Liu 001; Máire O'Neill (ISCAS, 2023)

Novel Intrinsic Physical Unclonable Function Design for Post-quantum Cryptography. - Baosheng Wang; Yijun Cui; Chongyan Gu; Chenghua Wang; Weiqiang Liu 001 (ISCAS, 2023)

A Novel Method Against Hardware Trojans in Approximate Circuits. - Yuqin Dou; Chongyan Gu; Chenghua Wang; Weiqiang Liu 001 (ISQED, 2023)

Hardware-Efficient Accurate and Approximate FPGA Multipliers for Error-Tolerant Applications. - Haonan Wang; Ke Chen 018; Chenggang Yan 002; Bi Wu; Weiqiang Liu 001 (MWSCAS, 2023)

A High Accuracy and Hardware Efficient Adaptive Filter Design with Approximate Computing. - Wenzhuo Xie; Chenggang Yan 002; Hanghang Wang; Ke Chen 018; Bi Wu; Chenghua Wang; Weiqiang Liu 001 (MWSCAS, 2023)

An RRAM-based PUF with Adjustable Programmable Voltage and Multi-Mode Operation. - Yijun Cui; Jiang Li 012; Chongyan Gu; Chenghua Wang; Weiqiang Liu 001 (NANOARCH, 2023)

VLCP: A High-Performance FPGA-based CNN Accelerator with Vector-level Cluster Pruning. - Shuo Ran; Bi Wu; Ke Chen 018; Weiqiang Liu 001 (NANOARCH, 2023)

Turn Passive to Active: A Survey on Active Intellectual Property Protection of Deep Learning Models. - Mingfu Xue; Leo Yu Zhang; Yushu Zhang 001; Weiqiang Liu 001 (CoRR, 2023)

ActiveGuard: An active intellectual property protection technique for deep neural networks by leveraging adversarial examples as users' fingerprints. - Mingfu Xue; Shichang Sun; Can He; Dujuan Gu; Yushu Zhang 001; Jian Wang 038; Weiqiang Liu 001 (IET Comput. Digit. Tech., 2023)

MLiM: High-Performance Magnetic Logic in-Memory Scheme With Unipolar Switching SOT-MRAM. - Bi Wu; Haonan Zhu; Ke Chen 018; Chenggang Yan 002; Weiqiang Liu 001 (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

Security and Approximation: Vulnerabilities in Approximation-Aware Testing. - Yuqin Dou; Chongyan Gu; Chenghua Wang; Weiqiang Liu 001; Fabrizio Lombardi (IEEE Trans. Emerg. Top. Comput., 2023)

An Energy-Efficient Computing-in-Memory (CiM) Scheme Using Field-Free Spin-Orbit Torque (SOT) Magnetic RAMs. - Bi Wu; Haonan Zhu; Dayane Reis; Zhaohao Wang; Ying Wang 001; Ke Chen 018; Weiqiang Liu 001; Fabrizio Lombardi; Xiaobo Sharon Hu (IEEE Trans. Emerg. Top. Comput., 2023)

AdvParams: An Active DNN Intellectual Property Protection Technique via Adversarial Perturbation Based Parameter Encryption. - Mingfu Xue; Zhiyu Wu; Yushu Zhang 001; Jian Wang 038; Weiqiang Liu 001 (IEEE Trans. Emerg. Top. Comput., 2023)

Use the Spear as a Shield: An Adversarial Example Based Privacy-Preserving Technique Against Membership Inference Attacks. - Mingfu Xue; Chengxiang Yuan; Can He; Yinghao Wu; Zhiyu Wu; Yushu Zhang 001; Zhe Liu 001; Weiqiang Liu 001 (IEEE Trans. Emerg. Top. Comput., 2023)

Low-Overhead Triple-Node-Upset-Tolerant Latch Design in 28-nm CMOS. - Xin Chen 039; Yuxin Bai; Jianpeng Cao; Lei Wang 226; Xinjie Zhou; Ying Zhang 068; Weiqiang Liu 001 (IEEE Trans. Very Large Scale Integr. Syst., 2023)

Approximate Softmax Functions for Energy-Efficient Deep Neural Networks. - Ke Chen 018; Yue Gao; Haroon Waris; Weiqiang Liu 001; Fabrizio Lombardi (IEEE Trans. Very Large Scale Integr. Syst., 2023)

Dataset authorization control: protect the intellectual property of dataset via reversible feature space adversarial examples. - Mingfu Xue; Yinghao Wu; Yushu Zhang 001; Jian Wang 038; Weiqiang Liu 001 (Appl. Intell., 2023)

Hardware Efficient Successive-Cancellation Polar Decoders Using Approximate Computing. - Chenggang Yan 002; Yuxuan Cui; Ke Chen 018; Bi Wu; Weiqiang Liu 001 (IEEE J. Emerg. Sel. Topics Circuits Syst., 2023)

ENAP: An Efficient Number-Aware Pruning Framework for Design Space Exploration of Approximate Configurations. - Yuqin Dou; Chenghua Wang; Roger F. Woods; Weiqiang Liu 001 (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

Detecting backdoor in deep neural networks via intentional adversarial perturbations. - Mingfu Xue; Yinghao Wu; Zhiyu Wu; Yushu Zhang 001; Jian Wang 038; Weiqiang Liu 001 (Inf. Sci., 2023)

Exact and Approximate Squarers for Error-Tolerant Applications. - Ke Chen 018; Chenyu Xu; Haroon Waris; Weiqiang Liu 001; Paolo Montuschi; Fabrizio Lombardi (IEEE Trans. Computers, 2023)

Compression-resistant backdoor attack against deep neural networks. - Mingfu Xue; Xin Wang; Shichang Sun; Yushu Zhang 001; Jian Wang 038; Weiqiang Liu 001 (Appl. Intell., 2023)

High-Throughput Polynomial Multiplier for Accelerating Saber on FPGA. - Yijun Cui; Yuantuo Zhang; Ziying Ni; Shichao Yu; Chenghua Wang; Weiqiang Liu 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

Design of High Hardware Efficiency Approximate Floating-Point FFT Processor. - Chenggang Yan 002; Xuan Zhao; Tingting Zhang; Jipeng Ge; Chenghua Wang; Weiqiang Liu 001 (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

HPKA: A High-Performance CRYSTALS-Kyber Accelerator Exploring Efficient Pipelining. - Ziying Ni; Ayesha Khalid; Dur-e-Shahwar Kundi; Máire O'Neill; Weiqiang Liu 001 (IEEE Trans. Computers, 2023)

Tracking the Leaker: An Encodable Watermarking Method for Dataset Intellectual Property Protection. - Yifan Shang; Mingfu Xue; Leo Yu Zhang; Yushu Zhang 001; Weiqiang Liu 001 (ACM TUR-C, 2024)

An Imperceptible and Owner-unique Watermarking Method for Graph Neural Networks. - Linji Zhang; Mingfu Xue; Leo Yu Zhang; Yushu Zhang 001; Weiqiang Liu 001 (ACM TUR-C, 2024)

HGH-CORDIC: A High-Radix Generalized Hyperbolic COordinate Rotation Digital Computer. - Hui Chen 015; Lianghua Quan; Weiqiang Liu 001 (ARITH, 2024)

A Time Efficient Comprehensive Model of Approximate Multipliers for Design Space Exploration. - Ziying Cui; Ke Chen 018; Bi Wu; Chenggang Yan 002; Yu Gong; Weiqiang Liu 001 (ARITH, 2024)

Truly Random Number Generation by Using in-Plane Magnetic Tunnel Junction with Weak Anisotropy. - You Wang 002; Chaoyue Zhang; Yefan Xu; Yu Gong; Hao Cai 001; Weiqiang Liu 001 (AsianHOST, 2024)

High Reliable Processor-Based PUF on Voltage Over-Scaling Technique. - Xinyuan Zhao; Yijun Cui; Fei Lyu 006; Chongyan Gu; Chenghua Wang; Weiqiang Liu 001 (AsianHOST, 2024)

A Concealable RRAM Physical Unclonable Function Compatible with In-Memory Computing. - Jiang Li 012; Yijun Cui; Chenghua Wang; Weiqiang Liu 001; Shahar Kvatinsky (DATE, 2024)

Bitstream Fault Injection Attacks on CRYSTALS Kyber Implementations on FPGAs. - Ziying Ni; Ayesha Khalid; Weiqiang Liu 001; Máire O'Neill (DATE, 2024)

Most Significant One-Driven Shifting Dynamic Efficient Multipliers for Large Language Models. - Bin Gong; Ke Chen 018; Pengfei Huang; Bi Wu; Weiqiang Liu 001 (ISCAS, 2024)

FPGA Bitstream Fault Injection Attack and Countermeasures on the Sampling Counter in CRYSTALS Kyber. - Ziying Ni; Ayesha Khalid; Weiqiang Liu 001; Máire O'Neill (ISCAS, 2024)

A High-accuracy Time-efficient Error Metric Model for Approximate Computing Circuits. - Shouji Chen; Ke Chen 018; Ziying Cui; Weiqiang Liu 001 (ISVLSI, 2024)

GATrojan: An Efficient Gate-level Hardware Trojan Detection Approach Using Graph Attention Networks. - Sen Wang; Yijun Cui; Shichao Yu; Chongyan Gu; Chenghua Wang; Weiqiang Liu 001 (SOCC, 2024)

Guest Editorial: Special Section on "Approximate Data Processing: Computing, Storage and Applications". - Ke Chen 018; Shanshan Liu 001; Weiqiang Liu 001; Fabrizio Lombardi; Nader Bagherzadeh (IEEE Trans. Emerg. Top. Comput., 2024)

Special Section on Emerging Topics in Hardware Computing Systems Security. - Gang Qu 001; Debdeep Mukhopadhyay; Nele Mentens; Weiqiang Liu 001 (IEEE Trans. Emerg. Top. Comput., 2024)

Imperceptible and multi-channel backdoor attack. - Mingfu Xue; Shifeng Ni; Yinghao Wu; Yushu Zhang 001; Weiqiang Liu 001 (Appl. Intell., 2024)

An Efficient Ring Oscillator PUF Using Programmable Delay Units on FPGA. - Yijun Cui; Jiang Li 012; Yunpeng Chen; Chenghua Wang; Chongyan Gu; Máire O'Neill; Weiqiang Liu 001 (ACM Trans. Design Autom. Electr. Syst., 2024)

Fully Learnable Hyperdimensional Computing Framework With Ultratiny Accelerator for Edge-Side Applications. - Tianyang Yu; Bi Wu; Ke Chen 018; Gong Zhang 002; Weiqiang Liu 001 (IEEE Trans. Computers, 2024)

VoAD: A Sub-μW Multiscene Voice Activity Detector Deploying Analog-Frontend Digital-Backend Circuits. - Yu Gong; Bo Liu 019; Hao Cai 001; Longxing Shi; Weiqiang Liu 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

Edge-Side Fine-Grained Sparse CNN Accelerator With Efficient Dynamic Pruning Scheme. - Bi Wu; Tianyang Yu; Ke Chen 018; Weiqiang Liu 001 (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

Untargeted Backdoor Attack Against Deep Neural Networks With Imperceptible Trigger. - Mingfu Xue; Yinghao Wu; Shifeng Ni; Leo Yu Zhang; Yushu Zhang 001; Weiqiang Liu 001 (IEEE Trans. Ind. Informatics, 2024)

FPAX: A Fast Prior Knowledge-Based Framework for DSE in Approximate Configurations. - Yuqin Dou; Chenghua Wang; Haroon Waris; Roger F. Woods; Weiqiang Liu 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

Low-Overhead Triple-Node-Upset Self-Recoverable Latch Design for Ultra-Dynamic Voltage Scaling Application. - Xin Chen 039; Yuxin Bai; Hao Cai 001; Congyi Zhu; Xinjie Zhou; Ying Zhang 068; Weiqiang Liu 001 (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

Toward Efficient Retraining: A Large-Scale Approximate Neural Network Framework With Cross-Layer Optimization. - Tianyang Yu; Bi Wu; Ke Chen 018; Chenggang Yan 002; Weiqiang Liu 001 (IEEE Trans. Very Large Scale Integr. Syst., 2024)

A Potential Enabler for High-Performance In-Memory Multi-Bit Arithmetic Schemes With Unipolar Switching SOT-MRAM. - Haonan Zhu; Bi Wu; Tianyang Yu; Ke Chen 018; Chenggang Yan 002; Weiqiang Liu 001 (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

An Explainable Intellectual Property Protection Method for Deep Neural Networks Based on Intrinsic Features. - Mingfu Xue; Xin Wang; Yinghao Wu; Shifeng Ni; Leo Yu Zhang; Yushu Zhang 001; Weiqiang Liu 001 (IEEE Trans. Artif. Intell., 2024)

A 13.56-MHz Primary Driver With Fractional Capacitance Auto-Tuning Loop for Wireless-Powered Implantable Medical Devices. - Xiaodong Meng; Xing Li 004; Chi-Ying Tsui; Wing-Hung Ki; Weiqiang Liu 001 (IEEE J. Solid State Circuits, 2024)

SSAT: Active Authorization Control and User's Fingerprint Tracking Framework for DNN IP Protection. - Mingfu Xue; Yinghao Wu; Leo Yu Zhang; Dujuan Gu; Yushu Zhang 001; Weiqiang Liu 001 (ACM Trans. Multim. Comput. Commun. Appl., 2024)

A Reinforcement Learning-Based ELF Adversarial Malicious Sample Generation Method. - Mingfu Xue; Jinlong Fu; Zhiyuan Li; Shifeng Ni; Heyi Wu; Leo Yu Zhang; Yushu Zhang 001; Weiqiang Liu 001 (IEEE J. Emerg. Sel. Topics Circuits Syst., 2024)

Timing Error Tolerant CNN Accelerator With Layerwise Approximate Multiplication. - Bo Liu 019; Na Xie; Qingwen Wei; Guang Yang 036; Chonghang Xie; Weiqiang Liu 001; Hao Cai 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

AttnACQ: Attentioned-AutoCorrelation-Based Query for Hyperdimensional Associative Memory. - Tianyang Yu; Bi Wu; Ke Chen 018; Gong Zhang 002; Weiqiang Liu 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

Exploring Teaching Methods for Courses on Radiation Hardening Technology in ICs. - You Wang 002; Erya Deng; Yu Gong; Zhongkun Shen; Chenghua Wang; Yijun Cui; Weiqiang Liu 001 (ISCAS, 2025)

A High-Performance In-Memory Multi-Bit Adder Based on TST-MRAM. - Erya Deng; Zhongkun Shen; Yu Gong; Weiqiang Liu 001 (ISCAS, 2025)

An Efficient Hardware Implementation of Improved Plantard Mod-Multiplication for Lattice-Based Cryptography. - Mengxue Li; Jiansheng Chen; Bei Wang; Fei Lyv; Weiqiang Liu 001; Yijun Cui (ISCAS, 2025)

Ultra-compact and Side-channel Resistant Design of FIFO-based NTT Core for PQCs. - Jiatong Tian; Yijun Cui; Ziying Ni; Bei Wang; Fei Lyv; Chenghua Wang; Weiqiang Liu 001 (ISCAS, 2025)

High-Performance Co-Processing Architecture Using SOT-MRAM-Based In-memory Computing Scheme. - Kai Tian; Bi Wu; Ke Chen 018; Weiqiang Liu 001 (ISCAS, 2025)

Radiation-Hardened Design of TCAM for Single-Event Upset Tolerance. - Jiaqi You; Erya Deng; Zhongkun Shen; You Wang 002; Weiqiang Liu 001 (ISCAS, 2025)

Learning-Based Realtime Synthetic Aperture Radar Imaging for Embedded System on Satellite. - Tianyang Yu; Bi Wu; Weiqiang Liu 001 (ISCAS, 2025)

A Lightweight and Efficient BRAM-free NTT Unit for Crystals-Dilithium. - Junjie Zhong; Bei Wang; Zeren Zhu; Weiqiang Liu 001; Yijun Cui (ISCAS, 2025)

HRaccoon: A High-performance Configurable SCA Resilient Raccoon Hardware Accelerator. - Ziying Ni; Ayesha Khalid; Zhaoyu Zhang; Yijun Cui; Weiqiang Liu 001; Máire O'Neill (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2025)

An Active Authorization Control Method for Deep Reinforcement Learning Model Based on GANs and Adaptive Trigger. - Mingfu Xue; Kewei Chen 004; Leo Yu Zhang; Yushu Zhang 001; Weiqiang Liu 001 (IEEE Trans. Inf. Forensics Secur., 2025)

LAHDC: Logic-Aggregation-Based Query for Embedded Hyperdimensional Computing Accelerator. - Tianyang Yu; Bi Wu; Ke Chen 018; Gong Zhang 002; Weiqiang Liu 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)

A 0.09-pJ/Bit Logic-Compatible Multiple-Time Programmable (MTP) Memory-Based PUF Design for IoT Applications. - Shuming Guo; Yinyin Lin; Hao Wang; Yao Li 018; Chongyan Gu; Weiqiang Liu 001; Yijun Cui (IEEE Trans. Very Large Scale Integr. Syst., 2025)

Guest Editorial Special Issue on Emerging Hardware Security and Trust Technologies - AsianHOST 2023. - Xinmiao Zhang 001; Chongyan Gu; Mengmei Ye; Qiang Liu; Reza Azarderakhsh; Weiqiang Liu 001; Yang Li (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)

High-Radix Generalized Hyperbolic CORDIC and Its Hardware Implementation. - Hui Chen 015; Lianghua Quan; Ke Chen 018; Weiqiang Liu 001 (IEEE Trans. Computers, 2025)

A Highly Hardware Efficient ML-KEM Accelerator with Optimised Architectural Layers. - Ziying Ni; Ayesha Khalid; Weiqiang Liu 001; Máire O'Neill (ACM Trans. Embed. Comput. Syst., 2025)

Low-Cost Yet Effective Trojan Mitigation Techniques for Approximate Systems. - Zohaib Tariq; Haroon Waris; Rehan Ahmed; Yuqin Dou; Weiqiang Liu 001; Muhammad Imran 010 (IEEE Trans. Circuits Syst. II Express Briefs, 2025)

An Efficient Methodology for Binary Logarithmic Computations of Floating-Point Numbers With Normalized Output Within One ulp of Accuracy. - Fei Lyu 002; Yuanyong Luo; Weiqiang Liu 001 (IEEE Trans. Computers, 2025)

Instruction-Based High-Performance Hardware Controller of CRYSTALS-Kyber With Balanced Resource Utilization. - Yijun Cui; Jiansheng Chen; Ziying Ni; Zhuoyao Zhang; Chenghua Wang; Weiqiang Liu 001 (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)

A Novel Error Metric for Evaluating the Error Correction Capability of Approximate Units. - Yuqin Dou; Zhikuang Cai; Haroon Waris; Roger F. Woods; Weiqiang Liu 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2025)

A 0.071pJ/Bit Flexible Multi-Mode Logic-Compatible Multiple-Time Programmable (MTP) Memory-Based PUF. - Yao Li 018; Yijun Cui; Shuming Guo; Jiang Li 012; Ruilin Zhang; Chongyan Gu; Chenghua Wang; Weiqiang Liu 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2025)

A Dual-Swing-Sample-and-Couple Sense Amplifier With Large Sensing Margin for STT-MRAM. - You Wang 002; Da Song; Jiaao Dai; Erya Deng; Yu Gong; Weiqiang Liu 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2025)

A Highly Reliable Dual-Mode RRAM PUF With Key Concealment Scheme. - Jiang Li 012; Yijun Cui; Chongyan Gu; Chenghua Wang; Weiqiang Liu 001; Shahar Kvatinsky (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)

High-Performance Hardware Implementation of Crystals-Dilithium Based on Improved MDC-NTT. - Yijun Cui; Junjie Zhong; Bei Wang; Tianyu Xu; Chenghua Wang; Weiqiang Liu 001 (IEEE Trans. Computers, 2025)