Design of passive UHF RFID tag in 130nm CMOS technology. - Yang Hong; Chi Fat Chan; Jianping Guo; Yuen Sum Ng; Weiwei Shi 001; Lincoln Lai Kan Leung; Ka Nang Leung; Chiu-sing Choy; Kong-Pang Pun (APCCAS, 2008)

A Low-power Signal Processing Front-end and Decoder for UHF Passive RFID Transponders. - Chi Fat Chan; Weiwei Shi 001; Kong-Pang Pun; Lincoln Lai Kan Leung; Ka Nang Leung; Oliver Chiu-sing Choy (ISCAS, 2009)

RF Module Design of Passive UHF RFID Tag Implemented in CMOS 90-nm Technology. - Ka Nang Leung; Chiu-sing Choy; Kong-Pang Pun; Lincoln Lai Kan Leung; Jianping Guo; Yuen Sum Ng; Chi Fat Chan; Weiwei Shi 001; Yang Hong; Marco Ho; Ki-Leung Mak; Yanqing Ai (J. Low Power Electron., 2010)

A process-compatible passive RFID tag's digital design for subthreshold operation. - Weiwei Shi 001; Oliver Chiu-sing Choy (ICECS, 2012)

An open 45nm PD-SOI standard cell library based on verified BSIM SOI spice model with predictive technology. - Liwei Gong; Yuan Xu; Zhi Zhang; Weiwei Shi 001; Robert K. F. Teng (ASICON, 2013)

Key component designs of subthreshold baseband processors in passive RF device. - Weiwei Shi 001; Oliver Chiu-sing Choy; Robert K. F. Teng (ASICON, 2013)

Subthreshold passive RF tag's PIE decoder design with wide tolerance and custom ratioed logic cells. - Weiwei Shi 001; Oliver Chiu-sing Choy (ICECS, 2014)

A novel ratioed logic style for faster subthreshold digital circuits based on 90 nm CMOS and below. - Weiwei Shi 001; Oliver Chiu-sing Choy (SoCC, 2014)

Subthreshold passive RFID tag's baseband processor core design with custom modules and cells. - Weiwei Shi 001; Linqing Fu; Chiu-sing Choy (ICECS, 2015)

Subthreshold Passive RFID Tag's Baseband Processor Core Design with Custom Modules and Cells. - Weiwei Shi 001; Zhao Guangdong; Oliver Chiu-sing Choy (ISVLSI, 2016)

A 0.4V 320Mb/s 28.7µW 1024-bit configurable multiplier for subthreshold SOC encryption. - Weiwei Shi 001; Chiu-sing Choy (SoCC, 2016)

Integrating channel selection and feature selection in a real time epileptic seizure detection system. - Hongda Wang; Weiwei Shi 001; Chiu-sing Choy (EMBC, 2017)

Mixed Design of SPAD Array Based TOF for Depth Camera and Unmanned Vehicle Applications. - Weiwei Shi 001; An Pan (SMACD, 2018)

Hardware Design of Real Time Epileptic Seizure Detection Based on STFT and SVM. - Hongda Wang; Weiwei Shi 001; Chiu-Sing Choy (IEEE Access, 2018)

A Subthreshold Baseband Processor Core Design With Custom Modules and Cells for Passive RFID Tags. - Weiwei Shi 001; An Pan; Shi Yu; Chiu-sing Choy (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

A 0.35 V 376 Mb/s Configurable Long Integer Multiplier for Subthreshold Encryption. - Weiwei Shi 001; Hai-Peng Wang; Chiu-Sing Choy; Junwei Yang; Mei Jiang; Robert K. F. Teng; Mingcheng Zhu 002 (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

A 63.3ps TDC Measurement System Based on FPGA for Pulsed Laser Ranging. - Zhiyong Chen; Weiwei Shi 001; Guoqiang Xiong; Junwei Yang; Yuan Xu (ASICON, 2019)

A Optimized PPD CMOS Pixel with 26.09 % Transfer Efficiency Improvement and 43.34 % Crosstalk Suppression for I-ToF Application. - Junwei Yang; Weiwei Shi 001; Zhiyu Huang; Yuan Xu; Yanghao Zheng; Xuanbin Fang (ASICON, 2019)

A 0.4 V 298 nJ/op Neural Signal Spectral Feature Extraction Module With Novel Approximate MACs and Custom Compressors. - Weiwei Shi 001; Yuan Xu; Chiu-Sing Choy; Zhiyong Chen; Junwei Yang; Robert K. F. Teng; Mei Jiang; X. Deng (IEEE Trans. Circuits Syst. II Express Briefs, 2019)

Pseudo-NMOS Logic Circuits using ITO-Stabilized ZnO TFTs. - Lizhi Hu; Yang Hong; Weiwei Shi 001; Mengtao Ye; Yongqian Su (ICTA, 2020)

Design of basic block of neural signal detection chip. - Yongqian Su; Yang Hong; Weiwei Shi 001; Mengtao Ye; Lizhi Hu (ICTA, 2020)

Arithmetic and Logic Circuits Based on ITO-Stabilized ZnO TFT for Transparent Electronics. - Weiwei Shi 001; Lizhi Hu; Yuan Liu 022; Sunbin Deng; Yuming Xu; Hoi-Sing Kwok; Rongsheng Chen (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

Implementation of SVM-Based Low Power EEG Signal Classification Chip. - Yongqian Su; Weiwei Shi 001; Lizhi Hu; Suixing Zhuang (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

An EEG Signal Processing System Design with Approximate Operations. - Ziliang Yin; Weiwei Shi 001; Kezhu Liu (ICTA, 2023)

Cost effective Tanh activation function circuits based on fast piecewise linear logic. - Kezhu Liu; Weiwei Shi 001; Canji Huang; Dongdong Zeng (Microelectron. J., 2023)

An Area-Energy Efficient EEG Detection System Based On PWL and Nonlinear SVM. - Guijie Cao; Weiwei Shi 001; Jiasheng Wu; Zhihong Mo; Yuping Gao (BioCAS, 2024)

A Configurable EEG Procesing Driver Chip for Wireless Wearable Devices. - Ruijie Xue; Weiwei Shi 001; Yang Hong (ICTA, 2024)

Area-Delay-Energy-Efficient Approximate Dividers Based on Piecewise Linear Fitting of Surface. - Chaoyuan Wu; Weiwei Shi 001; Yida Yuan; Zhuoliang Zou; Zhihong Mo; Jiangwei He (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

An Area-Energy-Efficient 64-2048 Point FFT With Approximate Plane-Fitting Complex Multipliers. - Weiwei Shi 001; Jiasheng Wu; Yida Yuan; Zhihong Mo; Chaoyuan Wu; Jiangwei He (IEEE Trans. Very Large Scale Integr. Syst., 2025)