DSynth: A Pipeline Synthesis Environment for FPGAs. - Michael J. Wirthlin; Welson Sun (FCCM, 2006)

Combining module selection and resource sharing for efficient FPGA pipeline synthesis. - Welson Sun; Michael J. Wirthlin; Stephen Neuendorffer (FPGA, 2006)

FPGA Pipeline Synthesis Design Exploration Using Module Selection and Resource Sharing. - Welson Sun; Michael J. Wirthlin; Stephen Neuendorffer (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007)

SDSoC: A Higher-level Programming Environment for Zynq SoC and Ultrascale+ MPSoC. - Vinod Kathail; James Hwang; Welson Sun; Yogesh Chobe; Tom Shui; Jorge Carrillo (FPGA, 2016)

Pharos: a Performance Monitor for Multi-FPGA Systems. - Arzhang Rafii; Paul Chow; Welson Sun (FCCM, 2021)

Pharos: a Multi-FPGA Performance Monitor. - Arzhang Rafii; Welson Sun; Paul Chow (FPL, 2021)