A Two-Cycle Lock-In Time ADPLL Design Based on a Frequency Estimation Algorithm. - Chia-Tsun Wu; Wen-Chung Shen; Wei Wang 252; An-Yeu Wu (IEEE Trans. Circuits Syst. II Express Briefs, 2010)

A scalable built-in self-recovery (BISR) VLSI architecture and design methodology for 2D-mesh based on-chip networks. - Kun-Chih Chen; Shu-Yen Lin; Wen-Chung Shen; An-Yeu Wu (Des. Autom. Embed. Syst., 2011)

Securing M2M With Post-Quantum Public-Key Cryptography. - Jie-Ren Shih; Yongbo Hu; Ming-Chun Hsiao; Ming-Shing Chen; Wen-Chung Shen; Bo-Yin Yang; An-Yeu Wu; Chen-Mou Cheng (IEEE J. Emerg. Sel. Topics Circuits Syst., 2013)

New Ping-Pong Scheduling for Low-Latency EMD Engine Design in Hilbert-Huang Transform. - Wen-Chung Shen; Hsiao-I Jen; An-Yeu Wu (IEEE Trans. Circuits Syst. II Express Briefs, 2013)

Low-complexity sinusoidal-assisted EMD (SAEMD) algorithms for solving mode-mixing problems in HHT. - Wen-Chung Shen; Yu-Hao Chen; An-Yeu Andy Wu (Digit. Signal Process., 2014)

A 1.96mm2 low-latency multi-mode crypto-coprocessor for PKC-based IoT security protocols. - Cheng-Rung Tsai; Ming-Chun Hsiao; Wen-Chung Shen; An-Yeu Andy Wu; Chen-Mou Cheng (ISCAS, 2015)