Architectural Choices for Multi-level Cache Hierarchies. - Jean-Loup Baer; Wen-Hann Wang (ICPP, 1987)

On the Inclusion Properties for Multi-Level Cache Hierarchies. - Jean-Loup Baer; Wen-Hann Wang (ISCA, 1988)

Organization and Performance of a Two-Level Virtual-Real Cache Hierarchy. - Wen-Hann Wang; Jean-Loup Baer; Henry M. Levy (ISCA, 1989)

Multilevel Cache Hierarchies: Organizations, Protocols, and Performance. - Jean-Loup Baer; Wen-Hann Wang (J. Parallel Distributed Comput., 1989)

Multiple Interleaved Bus Architectures. - Jonathan Bertoni; Wen-Hann Wang (ICPP (1), 1991)

Efficient Trace-Driven Simulation Methods for Cache Performance Analysis. - Wen-Hann Wang; Jean-Loup Baer (ACM Trans. Comput. Syst., 1991)

Revisit the case for direct-mapped chaches: a case for two-way set-associative level-two caches. - Wen-Hann Wang; Jim Quinlan; Konrad Lai (ISCA, 1992)

Scaling shared-bus multiprocessors with multiple buses and shared caches: a performance study. - Jonathan Bertoni; Jean-Loup Baer; Wen-Hann Wang (Microprocess. Microsystems, 1992)

Enabling Multiprocessor Technology: Introduction. - Wen-Hann Wang; Shreekant S. Thakkar (HICSS (1), 1994)

Microprocessor Architecture Challenges - The Best is Yet to Come! - Wen-Hann Wang (ACM Comput. Surv., 1996)

Guest Editors' Introduction: Computer Architecture Simulations. - Kimming So; Wen-Hann Wang (Int. J. Comput. Simul., 1996)

Retrospective: On the Inclusion Properties for Multi-Level Cache Hierarchies. - Jean-Loup Baer; Wen-Hann Wang (25 Years ISCA: Retrospectives and Reprints, 1998)

Usage Model Considerations for Future Distributed Computing Systems. - Wen-Hann Wang (FTDCS, 2004)

Virtualization Technology: Past, Present, and Future. - Wen-Hann Wang (GPC, 2008)