Wen-Hao Liu

According to our database1, Wen-Hao Liu authored at least 38 papers between 2009 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2022
Timing-Aware Layer Assignment for Advanced Process Technologies Considering via Pillars.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

In-Route Pin Access-Driven Placement Refinement for Improved Detailed Routing Convergence.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Challenges for Automating Package Routing.
Proceedings of the ISPD 2022: International Symposium on Physical Design, Virtual Event, Canada, March 27, 2022

2021
A bibliometric review of ecological research on the Qinghai-Tibet Plateau, 1990-2019.
Ecol. Informatics, 2021

ALIFRouter: A Practical Architecture-Level Inter-FPGA Router for Logic Verification.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020
MSFRoute: Multi-Stage FPGA Routing for Timing Division Multiplexing Technique.
Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020

MiniDelay: Multi-Strategy Timing-Aware Layer Assignment for Advanced Technology Nodes.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019
ISPD 2019 Initial Detailed Routing Contest and Benchmark with Advanced Routing Rules.
Proceedings of the 2019 International Symposium on Physical Design, 2019

Latency constraint guided buffer sizing and layer assignment for clock trees with useful skew.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

2018
MrDP: Multiple-Row Detailed Placement of Heterogeneous-Sized Cells for Advanced Nodes.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

ISPD 2018 Initial Detailed Routing Contest and Benchmarks.
Proceedings of the 2018 International Symposium on Physical Design, 2018

2017
Delay-driven layer assignment for advanced technology nodes.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2016
Augmenting VR/AR Applications with EEG/EOG Monitoring and Oculo-Vestibular Recoupling.
Proceedings of the Foundations of Augmented Cognition: Neuroergonomics and Operational Neuroscience, 2016

Negotiation-based track assignment considering local nets.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2015
Region-Based and Panel-Based Algorithms for Unroutable Placement Recognition.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

2014
Optimizing the Antenna Area and Separators in Layer Assignment of Multilayer Global Routing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

Skillfully diminishing antenna effect in layer assignment stage.
Proceedings of the Technical Papers of 2014 International Symposium on VLSI Design, 2014

ISPD 2014 benchmarks with sub-45nm technology rules for detailed-routing-driven placement.
Proceedings of the International Symposium on Physical Design, 2014

A study on unroutable placement recognition.
Proceedings of the International Symposium on Physical Design, 2014

A resource-level parallel approach for global-routing-based routing congestion estimation and a method to quantify estimation accuracy.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014

A study on the use of parallel wiring techniques for sub-20nm designs.
Proceedings of the Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21, 2014

Metal layer planning for silicon interposers with consideration of routability and manufacturing cost.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Density-aware Detailed Placement with Instant Legalization.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

Floorplanning and Signal Assignment for Silicon Interposer-based 3D ICs.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

2013
NCTU-GR 2.0: Multithreaded Collision-Aware Global Routing With Bounded-Length Maze Routing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

Case study for placement solutions in ispd11 and dac12 routability-driven placement contests.
Proceedings of the International Symposium on Physical Design, 2013

Habituation of steady-state visual evoked potentials in response to high-frequency polychromatic foveal visual stimulation.
Proceedings of the 35th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2013

Routing congestion estimation with real design constraints.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013

Optimization of placement solutions for routability.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013

2012
NCTU-GR: Efficient Simulated Evolution-Based Rerouting and Congestion-Relaxed Layer Assignment on 3-D Global Routing.
IEEE Trans. Very Large Scale Integr. Syst., 2012

Optimizing the antenna area and separators in layer assignment of multi-layer global routing.
Proceedings of the International Symposium on Physical Design, 2012

A fast maze-free routing congestion estimator with hybrid unilateral monotonic routing.
Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012

Topology-aware buffer insertion and GPU-based massively parallel rerouting for ECO timing optimization.
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

2011
High-quality global routing for multiple dynamic supply voltage designs.
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011

Negotiation-based layer assignment for via count and via overflow minimization.
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

2010
Multi-threaded collision-aware global routing with bounded-length maze routing.
Proceedings of the 47th Design Automation Conference, 2010

Minimizing clock latency range in robust clock tree synthesis.
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

2009
Efficient simulated evolution based rerouting and congestion-relaxed layer assignment on 3-D global routing.
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009


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