A high-performance area-aware DSP processor architecture for video codecs. - Lan-Da Van; Hsin-Fu Luo; Chien-Ming Wu; Wen-Hsiang Hu; Chun-Ming Huang; Wei-Chang Tsai (ICME, 2004)

Multi-Project System-on-Chip (MP-SoC): A Novel Test Vehicle for SoC Silicon Prototyping. - Chun-Ming Huang; Kuen-Jong Lee; Chih-Chyau Yang; Wen-Hsiang Hu; Shi-Shen Wang; Jeng-Bin Chen; Chi-Shi Chen; Lan-Da Van; Chien-Ming Wu; Wei-Chang Tsai; Jing-Yang Jou (SoCC, 2006)

Parallel LDPC Decoding on a Network-on-Chip Based Multiprocessor Platform. - Wen-Hsiang Hu; Jun Ho Bahn; Nader Bagherzadeh (SBAC-PAD, 2009)

Parallel FFT Algorithms on Network-on-Chips. - Jun Ho Bahn; Jungsook Yang; Wen-Hsiang Hu; Nader Bagherzadeh (J. Circuits Syst. Comput., 2009)

Area and Power-efficient Innovative Network-on-Chip Architecurte. - Chifeng Wang; Wen-Hsiang Hu; Seung Eun Lee; Nader Bagherzadeh (PDP, 2010)

A Wireless Network-on-Chip Design for Multicore Platforms. - Chifeng Wang; Wen-Hsiang Hu; Nader Bagherzadeh (PDP, 2011)

Area and power-efficient innovative congestion-aware Network-on-Chip architecture. - Chifeng Wang; Wen-Hsiang Hu; Seung Eun Lee; Nader Bagherzadeh (J. Syst. Archit., 2011)

A load-balanced congestion-aware wireless network-on-chip design for multi-core platforms. - Chifeng Wang; Wen-Hsiang Hu; Nader Bagherzadeh (Microprocess. Microsystems, 2012)

Scalable load balancing congestion-aware Network-on-Chip router architecture. - Chifeng Wang; Wen-Hsiang Hu; Nader Bagherzadeh (J. Comput. Syst. Sci., 2013)

Design and analysis of a mesh-based wireless network-on-chip. - Wen-Hsiang Hu; Chifeng Wang; Nader Bagherzadeh (J. Supercomput., 2015)