EMPAR: an interactive synthesis environment for hardware emulations. - Wen-Jong Fang; Allen C.-H. Wu; Tsing-Gen Lee (ASP-DAC, 1995)

The Design and Inplementation of a Cooperative Design-view Environment for Interactive Partitioning Applications. - Tsing-Gen Lee; Wen-Jong Fang; Allen C.-H. Wu (Softw. Pract. Exp., 1996)

DP-Gen: a datapath generator for multiple-FPGA applications. - Wen-Jong Fang; Allen C.-H. Wu; Ti-Yen Yen; Tsair-Chin Lin (ASP-DAC, 1997)

Multi-Way FPGA Partitioning by Fully Exploiting Design Hierarchy. - Wen-Jong Fang; Allen C.-H. Wu (DAC, 1997)

A Real-Time RTL Engineering-Change Method Supporting On-Line Debugging for Logic-Emulation Applications. - Wen-Jong Fang; Allen C.-H. Wu; Ti-Yen Yen (DAC, 1997)

Module Generation of Complex Macros for Logic-Emulation Applications. - Wen-Jong Fang; Allen C.-H. Wu; Duan-Ping Chen (FPGA, 1997)

Preserving HDL synthesis hierarchy for cell placement. - Yu-Wen Tsay; Wen-Jong Fang; Allen C.-H. Wu; Youn-Long Lin (ISPD, 1997)

A hierarchical functional structuring and partitioning approach for multiple-FPGA implementations. - Wen-Jong Fang; Allen C.-H. Wu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997)

Performance-Driven Multi-FPGA Partitioning Using Functional Clustering and Replication. - Wen-Jong Fang; Allen C.-H. Wu (DAC, 1998)

Integrating HDL Synthesis and Partitioning for Multi-FPGA Designs. - Wen-Jong Fang; Allen C.-H. Wu (IEEE Des. Test Comput., 1998)

A Multi-Level FPGA Synthesis Method Supporting HDL Debugging for Emulation-Based Designs. - Wen-Jong Fang; Peng-Cheng Kao; Allen C.-H. Wu (ASP-DAC, 1999)

EmGen-a module generator for logic emulation applications. - Wen-Jong Fang; Allen C.-H. Wu; Duan-Ping Chen (IEEE Trans. Very Large Scale Integr. Syst., 1999)

Multiway FPGA partitioning by fully exploiting design hierarchy. - Wen-Jong Fang; Allen C.-H. Wu (ACM Trans. Design Autom. Electr. Syst., 2000)