A 10-bit SAR ADC with two redundant decisions and splitted-MSB-cap DAC array. - Wen-Lan Wu; Sai-Weng Sin; Seng-Pan U; Rui Paulo Martins (APCCAS, 2012)

A 0.6V 8b 100MS/s SAR ADC with minimized DAC capacitance and switching energy in 65nm CMOS. - Wen-Lan Wu; Yan Zhu 001; Li Ding; Chi-Hang Chan; U. Fat Chio; Sai-Weng Sin; Seng-Pan U.; Rui Paulo Martins (ISCAS, 2013)

Creating a Scoring System with an Armband Wearable Device for Table Tennis Forehand Loop Training: Combined Use of the Principal Component Analysis and Artificial Neural Network. - Wen-Lan Wu; Jing-Min Liang; Chien-Fei Chen; Kuei-Lan Tsai; Nian-Shing Chen; Kuo-Chin Lin; Ing-Jer Huang (Sensors, 2021)