No zero padded sparse matrix-vector multiplication on FPGAs. - Jiasen Huang; Junyan Ren; Wenbo Yin; Lingli Wang (FPT, 2014)

Memory efficient and high performance key-value store on FPGA using Cuckoo hashing. - Wei Liang; Wenbo Yin; Ping Kang; Lingli Wang (FPL, 2016)

Hardware TCP Offload Engine based on 10-Gbps Ethernet for low-latency network communication. - Li Ding; Ping Kang; Wenbo Yin; Linli Wang (FPT, 2016)

A fully-pipelined hash table achieving low-latency and high throughput key-value retrieving system. - Li Ding; Wenbo Yin (ASICON, 2017)

A high performance real-time edge detection system with NEON. - Kaixuan Zhang; Li Ding; Yujie Cai; Wenbo Yin; Fan Yang 001; Jun Tao 001; Lingli Wang (ASICON, 2017)

FPGA acceleration of the scoring process of X!TANDEM for protein identification. - Jin Qiu; Ping Kang; Li Ding; Yipeng Yuan; Wenbo Yin; Lingli Wang (FPL, 2017)

Ultra-Low-Latency and Flexible In-memory Key-Value Store System Design on CPU-FPGA. - Yunhui Qiu; Hankun Lv; Jinyu Xie; Wenbo Yin; Lingli Wang (FPT, 2018)

Ultra-Low Latency and High Throughput Key-Value Store Systems Over Ethernet. - Li Ding; Wenbo Yin; Lingli Wang (ISCAS, 2018)

A Low-Latency Multi-Version Key-Value Store Using B-Tree on an FPGA-CPU Platform. - Yuchen Ren; Zhijian Liao; Xiaozhong Shi; Jinyu Xie; Yunhui Qiu; Hankun Lv; Wenbo Yin; Lingli Wang; Bowei Yu; Hua Chen; Xianjun He (FPL, 2019)

High-Throughput and Low-Latency Distributed Management Proxy for Key-Value Store Over 100Gbps Ethernet on FPGA. - Jinyu Xie; Yunhui Qiu; Wenbo Yin; Lingli Wang (FPT, 2019)

Empowering Female Entrepreneurs at the 2018 WIE ILC Start-Up Pitch Competition [Society News]. - Joseph Wei; Wenbo Yin (IEEE Consumer Electron. Mag., 2019)

High Throughput and Low Latency Multi-Version Management Key-Value Storage Accelerator. - Hankun Lv; Yuchen Ren; Yunhui Qiu; Wenbo Yin; Lingli Wang (FPT, 2020)

Achieving Flexible, Low-Latency and 100Gbps Line-rate Load Balancing over Ethernet on FPGA. - Jinyu Xie; Wenbo Yin; Lingli Wang (SoCC, 2020)

FULL-KV: Flexible and Ultra-Low-Latency In-Memory Key-Value Store System Design on CPU-FPGA. - Yunhui Qiu; Jinyu Xie; Hankun Lv; Wenbo Yin; Wai-Shing Luk; Lingli Wang; Bowei Yu; Hua Chen; Xianjun Ge; Zhijian Liao; Xiaozhong Shi (IEEE Trans. Parallel Distributed Syst., 2020)

A High-performance Open-channel Open-way NAND Flash Controller Architecture. - Yunhui Qiu; Wenbo Yin; Lingli Wang (FPL, 2021)

FastCGRA: A Modeling, Evaluation, and Exploration Platform for Large-Scale Coarse-Grained Reconfigurable Arrays. - Su Zheng; Kaisen Zhang; Yaoguang Tian; Wenbo Yin; Lingli Wang; Xuegong Zhou (FPT, 2021)

TRAM: An Open-Source Template-based Reconfigurable Architecture Modeling Framework. - Yunhui Qiu; Yuhang Cao; Yuan Dai; Wenbo Yin; Lingli Wang (FPL, 2022)

Knowledge Enhanced Pre-trained Language Model for Product Summarization. - Wenbo Yin; Junxiang Ren; Yuejiao Wu; Ruilin Song; Lang Liu; Zhen Cheng; Sibo Wang 010 (NLPCC (2), 2022)

A High-Performance and Scalable NVMe Controller Featuring Hardware Acceleration. - Yunhui Qiu; Wenbo Yin; Lingli Wang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

UPTRA: An Ultra-Parameterized Temporal CGRA Modeling and Optimization. - Yuan Dai; Yunhui Qiu; Qilong Zhu; Jingyuan Li 003; Wenbo Yin; Lingli Wang (FCCM, 2023)

PRAD: A Bayesian Optimization-based DSE Framework for Parameterized Reconfigurable Architecture Design. - Bingbing Peng; Shaoyang Sun; Yuan Dai; Jingyuan Li 003; Yunhui Qiu; Kaihang Wang; Wenbo Yin; Lingli Wang (FCCM, 2023)

E2-ACE: An Energy-Efficient Reconfigurable Crypto-Accelerator with Agile End-to-End Toolchain. - Yuhang Cao; Yunhui Qiu; Xuchen Gao; Qilong Zhu; Wenbo Yin; Lingli Wang (ICFPT, 2023)

GRAFT: GNN-based Adaptive Framework for Efficient CGRA Mapping. - Jiangnan Li; Chang Cai; Yaya Zhao; Yazhou Yan; Wenbo Yin; Lingli Wang (ICFPT, 2023)

A Dynamic Partial Reconfigurable CGRA Framework for Multi-Kernel Applications. - Qilong Zhu; Yuhang Cao; Yunhui Qiu; Xuchen Gao; Wenbo Yin; Lingli Wang (ICFPT, 2023)

THRAM: A Template-based Heterogeneous CGRA Modeling Framework Supporting Fast DSE. - Jingyuan Li 003; Yunhui Qiu; Guowei Zhu; Qilong Zhu; Wenbo Yin; Lingli Wang (ISCAS, 2023)

CPIC at SemEval-2023 Task 7: GPT2-Based Model for Multi-evidence Natural Language Inference for Clinical Trial Data. - Mingtong Huang; Junxiang Ren; Lang Liu; Ruilin Song; Wenbo Yin (SemEval@ACL, 2023)

An End-to-End Agile Design Framework to Improve Energy Efficiency on CGRAs. - Jiangnan Li; Yazhou Yan; Guowei Zhu; Wenbo Yin; Lingli Wang (ASAP, 2024)

MDCRA: A Reconfigurable Accelerator Framework for Multiple Dataflow Lanes. - Shaoyang Sun; Boyin Jin; Jiahang Lou; Jiangnan Li; Yuhang Cao; Jingyuan Li 003; Chen Shen; Yuan Dai; Wenbo Yin; Wai-Shing Luk; Lingli Wang (ASAP, 2024)

A CGRA Front-end Compiler Enabling Extraction of General Control and Dedicated Operators. - Xuchen Gao; Yunhui Qiu; Yuan Dai; Wenbo Yin; Lingli Wang (ASPDAC, 2024)

An Agile Deploying Approach for Large-Scale Workloads on CGRA-CPU Architecture. - Jiahang Lou; Xuchen Gao; Yiqing Mao; Yunhui Qiu; Yihan Hu 003; Wenbo Yin; Lingli Wang (DATE, 2024)

CFEACT: A CGRA-based Framework Enabling Agile CNN and Transformer Accelerator Design. - Yiqing Mao; Xuchen Gao; Jiahang Lou; Yunhui Qiu; Wenbo Yin; Wai-Shing Luk; Lingli Wang (FPL, 2024)

TransMap: An Efficient CGRA Mapping Framework via Transformer and Deep Reinforcement Learning. - Jingyuan Li 003; Yuan Dai; Yihan Hu 003; Jiangnan Li; Wenbo Yin; Jun Tao 001; Lingli Wang (IPDPS (Workshops), 2024)

An Architecture-Agnostic Dataflow Mapping Framework on CGRA. - Jiangnan Li; Yazhou Yan; Jingyuan Li 003; Shaoyang Sun; Boyin Jin; Wenbo Yin; Lingli Wang (IPDPS (Workshops), 2024)

FDRA: A Framework for a Dynamically Reconfigurable Accelerator Supporting Multi-Level Parallelism. - Yunhui Qiu; Yiqing Mao; Xuchen Gao; Sichao Chen; Jiangnan Li; Wenbo Yin; Lingli Wang (ACM Trans. Reconfigurable Technol. Syst., 2024)

HETA: A Heterogeneous Temporal CGRA Modeling and Design Space Exploration via Bayesian Optimization. - Yuan Dai; Jingyuan Li 003; Qilong Zhu; Yunhui Qiu; Yihan Hu 003; Wenbo Yin; Lingli Wang (IEEE Trans. Very Large Scale Integr. Syst., 2024)

HierCGRA: A Novel Framework for Large-scale CGRA with Hierarchical Modeling and Automated Design Space Exploration. - Sichao Chen; Chang Cai; Su Zheng; Jiangnan Li; Guowei Zhu; Jingyuan Li 003; Yazhou Yan; Yuan Dai; Wenbo Yin; Lingli Wang (ACM Trans. Reconfigurable Technol. Syst., 2024)

Towards Efficient Data Parallelism on Spatial CGRA via Constraint Satisfaction and Graph Coloring. - Yuan Dai; Xuchen Gao; Chen Shen; Bingbing Peng; Wenbo Yin; Wai-Shing Luk; Lingli Wang (ASP-DAC, 2025)

ICIMG-Net: Inject Context Information to Motion Generation for Optical Flow Estimation. - Wenbo Yin; Congxuan Zhang; Zhen Chen 004; Cheng Feng; Liyue Ge; Zige Wang (ICASSP, 2025)

COFFA: A Co-Design Framework for Fused-Grained Reconfigurable Architecture Towards Efficient Irregular Loop Handling. - Yuan Dai; Xuchen Gao; Yunhui Qiu; Jingyuan Li 003; Yuhang Cao; Yiqing Mao; Sichao Chen; Wenbo Yin; Wai-Shing Luk; Lingli Wang (IEEE Trans. Computers, 2025)