A 65nm CMOS SoC with embedded HSDPA/EDGE transceiver, digital baseband and multimedia processor. - Alberto Cicalini; Sankaran Aniruddhan; Rahul Apte; Frederic Bossu; Ojas Choksi; Dan Filipovic; Kunal Godbole; Tsai-Pi Hung; Christos Komninakis; David Maldonado; Chiewcharn Narathong; Babak Nejati; et al. (ISSCC, 2011)

Design and performance evaluation of data flow processor. - Wenjun Su (ChinaCom, 2014)

Field programmable gate Array Implementation Method of Electrocardiogram Signal Processing and Analysis. - Yunping Liang; Wenjun Su; Mengni Li; Ye Li (BMEI, 2015)

Topology optimization techniques for mobile robot path planning. - Baotong Li; Honglei Liu; Wenjun Su (Appl. Soft Comput., 2019)

An FPGA-Based Hardware Accelerator for 2D Labeling. - Xianfu Xu; Wenjun Su; Bin Li; Yini Wei; Deyu Kong; Hongjie Zeng; Xuejun Zhang (ICBIP, 2021)

Gradient harmonized loss: Improving the performance of intelligent diagnosis models in large imbalance scenarios. - Zhijun Ren; Wenjun Su; Tantao Lin; Rui Zhang; Yongsheng Zhu; Ke Yan; Jun Hong 002 (ICPHM, 2022)

Diagnosis of Alzheimer's disease using hypergraph p-Laplacian regularized multi-task feature learning. - Yanjiao Ban; Huan Lao; Bin Li; Wenjun Su; Xuejun Zhang (J. Biomed. Informatics, 2023)