MaPU: A novel mathematical computing architecture. - Donglin Wang; Xueliang Du; Leizu Yin; Chen Lin; Hong Ma; Weili Ren; Huijuan Wang; Xingang Wang; Shaolin Xie; Lei Wang; Zijun Liu; Tao Wang; et al. (HPCA, 2016)

Optimization of clock mesh based on wire sizing variation. - Meng Liu 018; Zhiwei Zhang; Wenqin Sun; Donglin Wang (ISOCC, 2017)

Obstacle-aware symmetrical clock tree construction. - Meng Liu 018; Zhiwei Zhang; Wenqin Sun; Donglin Wang (MWSCAS, 2017)

A novel obstacle-aware multiple fan-out symmetrical clock tree synthesis. - Meng Liu 018; Zhiwei Zhang; Wenqin Sun; Donglin Wang (IEICE Electron. Express, 2017)