A low output ripple and high security on-chip voltage regulation based on Fourier transform. - Jiafeng Cheng; Wenrui Liu 002; Nengyuan Sun; Zhaokang Peng; Caiban Sun; Chunyang Wang; Yijian Bi; Yiming Wen; Hongliu Zhang; Pengcheng Zhang; Weize Yu (Int. J. Circuit Theory Appl., 2023)

A novel hardware authentication primitive against modeling attacks. - Wenrui Liu 002; Jiafeng Cheng; Nengyuan Sun; Zhaokang Peng; Caiban Sun; Chunyang Wang; Yiming Wen; Hongliu Zhang; Pengcheng Zhang; Weize Yu (Int. J. Circuit Theory Appl., 2023)

A sequential strong PUF architecture based on reconfigurable neural networks (RNNs) against state-of-the-art modeling attacks. - Zhaokang Peng; Nengyuan Sun; Jiafeng Cheng; Wenrui Liu 002; Chunyang Wang; Yijian Bi; Caiban Sun; Yufei Wang; Yiming Wen; Yubin Wang; Weize Yu (Integr., 2023)

Neural Network-Based Entropy: A New Metric for Evaluating Side-Channel Attacks. - Jiafeng Cheng; Nengyuan Sun; Wenrui Liu 002; Zhaokang Peng; Chunyang Wang; Caiban Sun; Yufei Wang; Yijian Bi; Yiming Wen; Hongliu Zhang; Pengcheng Zhang; Selçuk Köse; et al. (J. Circuits Syst. Comput., 2023)

A machine learning low-dropout regulator-assisted differential power analysis attack countermeasure with voltage scaling. - Jiafeng Cheng; Wenrui Liu 002; Nengyuan Sun; Zhaokang Peng; Caiban Sun; Chunyang Wang; Yijian Bi; Yiming Wen; Hongliu Zhang; Pengcheng Zhang; Weize Yu (Int. J. Circuit Theory Appl., 2023)

A novel on-chip linear and switching mixed regulation against power analysis attacks. - Nengyuan Sun; Jiafeng Cheng; Wenrui Liu 002; Zhaokang Peng; Caiban Sun; Chunyang Wang; Heng Sha; Yufei Wang; Weize Yu (Integr., 2023)

A high-speed and low-latency hardware implementation of RC4 cryptographic algorithm. - Caiban Sun; Wenrui Liu 002; Jiafeng Cheng; Nengyuan Sun; Zhaokang Peng; Heng Sha; Weize Yu (Int. J. Circuit Theory Appl., 2023)

A low-overhead and high-reliability physical unclonable function (PUF) for cryptography. - Wenrui Liu 002; Jiafeng Cheng; Nengyuan Sun; Heng Sha; Ming Jin; Hongyang Zhao; Zhiyuan Pan; Jinghe Wang; Selçuk Köse; Weize Yu (Integr., 2024)

A 128-Gbps Pipelined SM4 Circuit With Dual DPA Attack Countermeasures. - Wenrui Liu 002; Jiafeng Cheng; Nengyuan Sun; Heng Sha; Zunxian Fu; Zhaokang Peng; Chunyang Wang; Caiban Sun; Pengliang Kong; Yunfeng Zhao; Yaoqiang Wang; Weize Yu (IEEE Trans. Very Large Scale Integr. Syst., 2024)

A novel SM4 cryptographic architecture against higher order power analysis attacks. - Nengyuan Sun; Wenrui Liu 002; Jiafeng Cheng; Zhaokang Peng; Chunyang Wang; Caiban Sun; Heng Sha; Zhiyuan Pan; Ming Jin; Hongyang Zhao; Jinghe Wang; Yiming Wen; et al. (Int. J. Circuit Theory Appl., 2024)

State-of-the-Art 3DES Pipelined Cryptographic Engine Design Against Side-Channel Attacks. - Kai Shi; Chunyang Wang; Jiafeng Cheng; Wenrui Liu 002; Nengyuan Sun; Hongyang Zhao; Heng Sha; Zhiyuan Pan; Ming Jin; Jinghe Wang; Zhaoyi Niu; Jianghong Li; et al. (Int. J. Circuit Theory Appl., 2025)