RDCIM: RISC-V Supported Full-Digital Computing-in-Memory Processor With High Energy Efficiency and Low Area Overhead. - Wente Yi; Kefan Mo; Wenjia Wang; Yitong Zhou; Yejun Zeng; Zihan Yuan; Bojun Cheng; Biao Pan (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

PipeCIM: A High-Throughput Computing-In-Memory Microprocessor With Nested Pipeline and RISC-V Extended Instructions. - Tingran Chen; Wenjia Wang; Jiaqi Chen; Haotian Fu; Wente Yi; Bojun Cheng; He Zhang 011; Biao Pan (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

A 24.65 TOPS/W@INT8 Hybrid Analog-Digital Multi-core SRAM CIM Macro with Optimal Weight Dividing and Resource Allocation Strategies. - Yitong Zhou; Wente Yi; Sifan Sun; Wenjia Wang; Jinyu Bai; He Zhang 011; Wang Kang 001 (ASP-DAC, 2025)

An FPGA Processor Combining Point Cloud and SNN for DVS-based ADAS Application. - Wenjia Wang; Hongwei Ren; Wente Yi; Kexun Cheng; Lehao Tan; Ying Cui; Chen Li; Bojun Cheng; Biao Pan (ISCAS, 2025)