Programming Models for Hybrid FPGA-CPU Computational Components: A Missing Link. - David Andrews 001; Douglas Niehaus; Razali Jidin; Michael Finley; Wesley Peck; Michael Frisbie; Jorge L. Ortiz; Ed Komp; Peter J. Ashenden (IEEE Micro, 2004)

Evaluation of the Hybrid Multithreading Programming Model using Image Processing Transforms. - Razali Jidin; David Andrews 001; Wesley Peck; Dan Chirpich; Kevin Stout; John M. Gauch (IPDPS, 2005)

The Case for High Level Programming Models for Reconfigurable Computers. - David L. Andrews 001; Ron Sass; Erik K. Anderson; Jason Agron; Wesley Peck; Jim Stevens; Fabrice Baijot; Ed Komp (ERSA, 2006)

Enabling a Uniform Programming Model Across the Software/Hardware Boundary. - Erik K. Anderson; Jason Agron; Wesley Peck; Jim Stevens; Fabrice Baijot; Ed Komp; Ron Sass; David Andrews 001 (FCCM, 2006)

Hthreads: A Computational Model for Reconfigurable Devices. - Wesley Peck; Erik K. Anderson; Jason Agron; Jim Stevens; Fabrice Baijot; David Andrews 001 (FPL, 2006)

Run-Time Services for Hybrid CPU/FPGA Systems on Chip. - Jason Agron; Wesley Peck; Erik K. Anderson; David Andrews 001; Ed Komp; Ron Sass; Fabrice Baijot; Jim Stevens (RTSS, 2006)

Memory Hierarchy for MCSoPC Multithreaded Systems. - Erik K. Anderson; Wesley Peck; Jim Stevens; Jason Agron; Fabrice Baijot; Seth Warn; David L. Andrews 001 (ERSA, 2007)

Supporting High Level Language Semantics Within Hardware Resident Threads. - Erik K. Anderson; Wesley Peck; Jim Stevens; Jason Agron; Fabrice Baijot; Seth Warn; David Andrews 001 (FPL, 2007)

Symmetric Multiprocessor Design for Hybrid CPU/FPGA SoCs. - Shane Santner; Wesley Peck; Jason Agron; David Andrews 001 (ARC, 2008)

Achieving Programming Model Abstractions for Reconfigurable Computing. - David Andrews 001; Ron Sass; Erik K. Anderson; Jason Agron; Wesley Peck; Jim Stevens; Fabrice Baijot; Ed Komp (IEEE Trans. Very Large Scale Integr. Syst., 2008)

Hardware/Software Co-Design via Specification Refinement. - Wesley Peck (2011)