High-performance CMOS variability in the 65-nm regime and beyond. - Kerry Bernstein; David J. Frank; Anne E. Gattiker; Wilfried Haensch; Brian L. Ji; Sani R. Nassif; Edward J. Nowak; Dale J. Pearson; Norman J. Rohrer (IBM J. Res. Dev., 2006)

Optimizing CMOS technology for maximum performance. - David J. Frank; Wilfried Haensch; Ghavam G. Shahidi; Omer H. Dokumaci (IBM J. Res. Dev., 2006)

Preface. - Wilfried Haensch; Mei-Kei Ieong (IBM J. Res. Dev., 2006)

Silicon CMOS devices beyond scaling. - Wilfried Haensch; Edward J. Nowak; Robert H. Dennard; Paul M. Solomon; Andres Bryant; Omer H. Dokumaci; Arvind Kumar; Xinlin Wang; Jeffrey B. Johnson; Massimo V. Fischetti (IBM J. Res. Dev., 2006)

Ultralow-voltage, minimum-energy CMOS. - Scott Hanson; Bo Zhai; Kerry Bernstein; David T. Blaauw; Andres Bryant; Leland Chang; Koushik K. Das; Wilfried Haensch; Edward J. Nowak; Dennis Sylvester (IBM J. Res. Dev., 2006)

Interconnects in the Third Dimension: Design Challenges for 3D ICs. - Kerry Bernstein; Paul S. Andry; Jerome Cann; Philip G. Emma; David Greenberg; Wilfried Haensch; Mike Ignatowski; Steven J. Koester; John Magerlein; Ruchir Puri; Albert M. Young (DAC, 2007)

Why should we do 3D integration? - Wilfried Haensch (DAC, 2008)

An 8T-SRAM for Variability Tolerance and Low-Voltage Operation in High-Performance Caches. - Leland Chang; Robert K. Montoye; Yutaka Nakamura; Kevin Batson; Richard J. Eickemeyer; Robert H. Dennard; Wilfried Haensch; Damir Jamsek (IEEE J. Solid State Circuits, 2008)

Practical Strategies for Power-Efficient Computing Technologies. - Leland Chang; David J. Frank; Robert K. Montoye; Steven J. Koester; Brian L. Ji; Paul W. Coteus; Robert H. Dennard; Wilfried Haensch (Proc. IEEE, 2010)

Near-threshold operation for power-efficient computing?: it depends... - Leland Chang; Wilfried Haensch (DAC, 2012)

Monolithic silicon photonics at 25 Gb/s. - Jason S. Orcutt; Douglas M. Gill; Jonathan E. Proesel; John J. Ellis-Monaghan; Folkert Horst; Tymon Barwicz; Chi Xiong; Frederick G. Anderson; Ankur Agrawal; Yves Martin; Christian W. Baks; Marwan Khater; et al. (OFC, 2016)

Monolithic Silicon Photonic WDM Transceivers. - Jessie C. Rosenberg; Folkert Horst; Marwan Khater; Frederick G. Anderson; Robert Leidy; Tymon Barwicz; Douglas M. Gill; Edward Kiewra; Yves Martin; Jason S. Orcutt; Andreas D. Stricker; Charles Whiting; et al. (ECOC, 2017)

Analog CMOS-based resistive processing unit for deep neural network training. - Seyoung Kim; Tayfun Gokmen; Hyung-Min Lee; Wilfried E. Haensch (MWSCAS, 2017)

Training Deep Convolutional Neural Networks with Resistive Cross-Point Devices. - Tayfun Gokmen; O. Murat Onen; Wilfried Haensch (CoRR, 2017)

NVM Weight Variation Impact on Analog Spiking Neural Network Chip. - Akiyo Nomura; Megumi Ito; Atsuya Okazaki; Masatoshi Ishii; SangBum Kim; Junka Okazawa; Kohji Hosokawa; Wilfried Haensch (ICONIP (7), 2018)

Training LSTM Networks with Resistive Cross-Point Devices. - Tayfun Gokmen; Malte J. Rasch; Wilfried Haensch (CoRR, 2018)

Efficient ConvNets for Analog Arrays. - Malte J. Rasch; Tayfun Gokmen; Mattia Rigotti; Wilfried Haensch (CoRR, 2018)

Performance Analysis of Spiking RBM with Measurement-Based Phase Change Memory Model. - Masatoshi Ishii; Megumi Ito; Wanki Kim; SangBum Kim; Akiyo Nomura; Atsuya Okazaki; Junka Okazawa; Kohji Hosokawa; Matthew BrightSky; Wilfried Haensch (ICONIP (5), 2019)

Training Large-Scale Spiking Neural Networks on Multi-core Neuromorphic System Using Backpropagation. - Megumi Ito; Malte J. Rasch; Masatoshi Ishii; Atsuya Okazaki; SangBum Kim; Junka Okazawa; Akiyo Nomura; Kohji Hosokawa; Wilfried Haensch (ICONIP (3), 2019)

Reliability Challenges with Materials for Analog Computing. - Eduard A. Cartier; Wanki Kim; Nanbo Gong; Tayfun Gokmen; Martin M. Frank; Douglas M. Bishop; Youngseok Kim; Seyoung Kim; Takashi Ando; Ernest Y. Wu; Praneet Adusumilli; John Rozen; et al. (IRPS, 2019)

Training large-scale ANNs on simulated resistive crossbar arrays. - Malte J. Rasch; Tayfun Gokmen; Wilfried Haensch (CoRR, 2019)

Algorithm for Training Neural Networks on Resistive Device Arrays. - Tayfun Gokmen; Wilfried Haensch (CoRR, 2019)

Neural network accelerator design with resistive crossbars: Opportunities and challenges. - Shubham Jain; Aayush Ankit; Indranil Chakraborty; Tayfun Gokmen; Malte J. Rasch; Wilfried Haensch; Kaushik Roy 001; Anand Raghunathan (IBM J. Res. Dev., 2019)

The Next Generation of Deep Learning Hardware: Analog Computing. - Wilfried Haensch; Tayfun Gokmen; Ruchir Puri (Proc. IEEE, 2019)

Training Large-scale Artificial Neural Networks on Simulated Resistive Crossbar Arrays. - Malte J. Rasch; Tayfun Gokmen; Wilfried Haensch (IEEE Des. Test, 2020)

Analysis of Effect of Weight Variation on SNN Chip with PCM-Refresh Method. - Akiyo Nomura; Megumi Ito; Atsuya Okazaki; Masatoshi Ishii; SangBum Kim; Junka Okazawa; Kohji Hosokawa; Wilfried Haensch (Neural Process. Lett., 2021)

A Co-design view of Compute in-Memory with Non-Volatile Elements for Neural Networks. - Wilfried Haensch; Anand Raghunathan; Kaushik Roy 001; Bhaswar Chakrabarti; Charudatta M. Phatak; Cheng Wang 036; Supratik Guha (CoRR, 2022)

Neural Network Training With Asymmetric Crosspoint Elements. - O. Murat Onen; Tayfun Gokmen; Teodor K. Todorov; Tomasz Nowicki; Jesús A. del Alamo; John Rozen; Wilfried Haensch; Seyoung Kim (Frontiers Artif. Intell., 2022)

Multi-Function Multi-Way Analog Technology for Sustainable Machine Intelligence Computation. - Vassilis Kalantzis; Mark S. Squillante; Shashanka Ubaru; Tayfun Gokmen; Chai Wah Wu; Anshul Gupta; Haim Avron; Tomasz Nowicki; Malte J. Rasch; O. Murat Onen; Vanessa López-Marrero; Effendi Leobandung; et al. (CoRR, 2024)

Error-Free and Current-Driven Synthetic Antiferromagnetic Domain Wall Memory Enabled by Channel Meandering. - Pengxiang Zhang; Wilfried Haensch; Charudatta M. Phatak; Supratik Guha (CoRR, 2024)

LRMP: Layer Replication with Mixed Precision for spatial in-memory DNN accelerators. - Abinand Nallathambi; Christin David Bose; Wilfried Haensch; Anand Raghunathan (Frontiers Artif. Intell., 2024)