Delay-Insensitive, Point-to-Point Interconnect Using M-of-N Codes. - W. J. Bainbridge; William B. Toms; David A. Edwards; Stephen B. Furber (ASYNC, 2003)

Efficient synthesis of speed-independent combinational logic circuits. - William B. Toms; David A. Edwards (ASP-DAC, 2005)

Synthesising Heterogeneously Encoded Systems. - William B. Toms; David A. Edwards; Andrew Bardsley (ASYNC, 2006)

Prime Indicants: A Synthesis Method for Indicating Combinational Logic Blocks. - William B. Toms; Doug A. Edwards (ASYNC, 2009)

A Complete Synthesis Method for Block-Level Relaxation in Self-Timed Datapaths. - William B. Toms; David A. Edwards (ACSD, 2010)

M-of-N Code Decomposition for Indicating Combinational Logic. - William B. Toms; David A. Edwards (ASYNC, 2010)

Indicating combinational logic decomposition. - William B. Toms; David A. Edwards (IET Comput. Digit. Tech., 2011)

Redundant Logic Insertion and Latency Reduction in Self-Timed Adders. - P. Balasubramanian 001; David A. Edwards; William B. Toms (VLSI Design, 2012)

Self-Timed Section-Carry Based Carry Lookahead Adders and the Concept of Alias Logic. - P. Balasubramanian 001; David A. Edwards; William B. Toms (J. Circuits Syst. Comput., 2013)

Optimised Synthesis of Asynchronous Elastic Dataflows by Leveraging Clocked EDA. - Mahdi Jelodari Mamaghani; Jim D. Garside; William B. Toms; Doug A. Edwards (DSD, 2014)

Architectural support for task scheduling: hardware scheduling for dataflow on NUMA systems. - Behram Khan; Daniel Goodman 001; Salman Khan 002; Will Toms; Paolo Faraboschi; Mikel Luján; Ian Watson (J. Supercomput., 2015)

Cyclic Power-Gating as an Alternative to Voltage and Frequency Scaling. - Yaman Cakmaki; Will Toms; Javier Navaridas; Mikel Luján (IEEE Comput. Archit. Lett., 2016)

The Potential of Dynamic Binary Modification and CPU-FPGA SoCs for Simulation. - John Mawer; Oscar Palomar; Cosmin Gorgovan; Andy Nisbet; Will Toms; Mikel Luján (FCCM, 2017)

Energy Efficient Power-Management for Out-of-Order Processors Using Cyclic Power-Gating. - William B. Toms; John Goodacre; Mikel Luján (ARCS, 2021)

Energy-Efficient Encoding for High-Speed Serial Interfaces. - Eleni Maragkoudaki; William B. Toms; Vasilis F. Pavlidis (IEEE Trans. Very Large Scale Integr. Syst., 2022)

DiAD - Distributed Acceleration for Datacenter FPGAs. - Joshua Lant; Emmanouil Skordalakis; Kyriakos Paraskevas; William B. Toms; Mikel Luján; John Goodacre (FPL, 2023)