Bit-level concurrency in real-time geometric feature extractions. - Wentai Liu; Tong-Fei Yeh; William E. Batchelor; Ralph K. Cavin III (CVPR, 1988)

A novel VLSI architecture for the real-time implementation of 2-D signal processing systems. - Seong-Mo Park; Winser E. Alexander; Jung H. Kim; William E. Batchelor; William T. Krakow (ICCD, 1988)

Exploiting Bit Level Concurrency in Real-Time Geometric Feature Extractions. - Wentai Liu; Tong-Fei Yeh; William E. Batchelor; Ralph K. Cavin III (ISCA, 1988)

The design and verification of a VLSI chip for electrocardiogram data compression. - Subhash C. Roy; William T. Krakow; B. Sacks; William E. Batchelor; L. N. Bohs; Roger C. Barr (CBMS, 1990)