Using regression analysis for GA-based ATPG parameter optimization. - William E. Dougherty; R. D. (Shawn) Blanton (ICCD, 1998)

Modeling and automating selection of guarding techniques for datapath elements. - William E. Dougherty; Donald E. Thomas (ISLPED, 1999)

Subsetting Behavioral Intellectual Property for Low Power ASIP Design. - William E. Dougherty; David J. Pursley; Donald E. Thomas (J. VLSI Signal Process., 1999)

Unifying behavioral synthesis and physical design. - William E. Dougherty; Donald E. Thomas (DAC, 2000)

Metrics for Structural Logic Synthesis. - Prabhakar Kudva; Andrew Sullivan; William E. Dougherty (IWLS, 2002)

SEAS: a system for early analysis of SoCs. - Reinaldo A. Bergamaschi; Youngsoo Shin; Nagu R. Dhanwada; Subhrajit Bhattacharya; William E. Dougherty; Indira Nair; John A. Darringer; Sarala Paliwal (CODES+ISSS, 2003)

Measurements for structural logic synthesis optimizations. - Prabhakar Kudva; Andrew Sullivan; William E. Dougherty (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003)

Transaction-level modeling for architectural and power analysis of PowerPC and CoreConnect-based systems. - Nagu R. Dhanwada; Reinaldo A. Bergamaschi; William W. Dungan; Indira Nair; Paul Gramann; William E. Dougherty; Ing-Chao Lin (Des. Autom. Embed. Syst., 2005)