The computer industry in the buyer's market. - J. A. Ricca; J. Presper Eckert; William J. Gallagher; R. W. Hubner; R. D. Schmidt (AFIPS Fall Joint Computing Conference (2), 1965)

Design and applications of a scanning SQUID microscope. - John R. Kirtley; Mark B. Ketchen; Chang C. Tsuei; Jonathan Z. Sun; William J. Gallagher; Lock See Yu-Jahnes; Arunava Gupta; Kevin G. Stawiasz; Shalom J. Wind (IBM J. Res. Dev., 1995)

A high-speed 128-kb MRAM core for future universal memory applications. - John K. DeBrosse; Dietmar Gogl; Alexander Bette; Heinz Hoenigschmid; Raphael Robertazzi; Christian Arndt; Daniel Braun 011; D. Casarotto; Robert Havreluk; Stefan Lammers; Werner Obermaier; William R. Reohr; et al. (IEEE J. Solid State Circuits, 2004)

A 16-Mb MRAM featuring bootstrapped write drivers. - Dietmar Gogl; Christian Arndt; John C. Barwin; Alexander Bette; John K. DeBrosse; Earl T. Gow; Heinz Hoenigschmid; Stefan Lammers; Mark C. Lamorey; Yu Lu; Tom Maffitt; Kim Maloney; et al. (IEEE J. Solid State Circuits, 2005)

Two-level BEOL processing for rapid iteration in MRAM development. - Michael C. Gaidis; Eugene J. O'Sullivan; Janusz Jozef Nowak; Yu Lu; Sivananda K. Kanakasabapathy; Philip Louis Trouilloud; Daniel Christopher Worledge; Solomon Assefa; Keith R. Milkove; George P. Wright; William J. Gallagher (IBM J. Res. Dev., 2006)

Preface. - William J. Gallagher; Stuart S. P. Parkin (IBM J. Res. Dev., 2006)

Development of the magnetic tunnel junction MRAM at IBM: From first junctions to a 16-Mb MRAM demonstrator chip. - William J. Gallagher; Stuart S. P. Parkin (IBM J. Res. Dev., 2006)

Design considerations for MRAM. - Thomas M. Maffitt; John K. DeBrosse; John A. Gabric; Earl T. Gow; Mark C. Lamorey; John S. Parenteau; Dennis R. Willmott; Mark A. Wood; William J. Gallagher (IBM J. Res. Dev., 2006)

A 2.5D integrated voltage regulator using coupled-magnetic-core inductors on silicon interposer delivering 10.8A/mm2. - Noah Sturcken; Eugene J. O'Sullivan; Naigang Wang; Philipp Herget; Bucknell C. Webb; Lubomyr T. Romankiw; Michele Petracca; Ryan Davies; Robert E. Fontana Jr.; Gary M. Decad; Ioannis Kymissis; Angel V. Peterchev; et al. (ISSCC, 2012)

A 2.5D Integrated Voltage Regulator Using Coupled-Magnetic-Core Inductors on Silicon Interposer. - Noah Sturcken; Eugene J. O'Sullivan; Naigang Wang; Philipp Herget; Bucknell C. Webb; Lubomyr T. Romankiw; Michele Petracca; Ryan Davies; Robert E. Fontana Jr.; Gary M. Decad; Ioannis Kymissis; Angel V. Peterchev; et al. (IEEE J. Solid State Circuits, 2013)

An 82%-efficient multiphase voltage-regulator 3D interposer with on-chip magnetic inductors. - Kevin Tien; Noah Sturcken; Naigang Wang; Jae-Woong Nah; Bing Dang; Eugene J. O'Sullivan; Paul S. Andry; Michele Petracca; Luca P. Carloni; William J. Gallagher; Kenneth L. Shepard (VLSIC, 2015)

Experimental Evaluation of Teleoperation Interfaces for Cutting of Satellite Insulation. - Will Pryor; Balázs P. Vágvölgyi; William J. Gallagher; Anton Deguet; Simon Léonard; Louis L. Whitcomb; Peter Kazanzides (ICRA, 2019)

Recent Progress and Next Directions for Embedded MRAM Technology. - William J. Gallagher; Eric Chien; Tien-Wei Chiang; Jian-Cheng Huang; Meng-Chun Shih; C. Y. Wang; Christine Bair; George Lee; Yi-Chun Shih; Chia-Fu Lee; Roger Wang; Kuei-Hung Shen; et al. (VLSI Circuits, 2019)