Comparison of parallelized radix-2 and radix-4 scalable Montgomery multipliers. - Andrew Carter; Paula Ning; William Koven; David Money Harris; Michael Braly; Nathan Jones; Julien Massas; Trevin Murakami; Alexandra Simoni; Sanu Mathew (ACSSC, 2013)

Implementation of a 64-bit Jackson adder. - Tynan McAuley; William Koven; Andrew Carter; Paula Ning; David Money Harris (ACSSC, 2013)

Performance and Area Optimization of a Bundled-Data Intel Processor through Resynthesis. - Arash Saifhashemi; Dylan Hand; Peter A. Beerel; William Koven; Hong Wang (ASYNC, 2014)

Adding Conditionality to Resilient Bundled-Data Designs. - Dylan Hand; Austin Katrin; William Koven (ASYNC, 2016)

Sharp - A Resilient Asynchronous Template. - Maxwell Waugaman; William Koven (ASYNC, 2017)

System-Level Design and Integration of a Prototype AR/VR Hardware Featuring a Custom Low-Power DNN Accelerator Chip in 7nm Technology for Codec Avatars. - Huseyin Ekin Sumbul; Tony F. Wu; Yuecheng Li; Syed Shakib Sarwar; William Koven; Eli Murphy-Trotzky; Xingxing Cai; Elnaz Ansari; Daniel H. Morris; Huichu Liu; Doyun Kim; Edith Beigné (CICC, 2022)

A QDI Interconnect for 3D Systems Using Industry Standard EDA and Cell Libraries. - Matheus Trevisan Moreira; William Koven; Tony F. Wu; Huseyin Ekin Sumbul; Edith Beigné (ASYNC, 2023)

11.2 A 3D integrated Prototype System-on-Chip for Augmented Reality Applications Using Face-to-Face Wafer Bonded 7nm Logic at <2μm Pitch with up to 40% Energy Reduction at Iso-Area Footprint. - Tony F. Wu; Huichu Liu; Huseyin Ekin Sumbul; Lita Yang; Dipti Baheti; Jeremy Coriell; William Koven; Anu Krishnan; Mohit Mittal; Matheus Trevisan Moreira; Max Waugaman; Laurent Ye; et al. (ISSCC, 2024)