The S/390 G5/G6 binodal cache. - Paul R. Turgeon; Pak-kin Mak; Michael A. Blake; Michael F. Fee; Carl B. Ford III; Patrick J. Meaney; A. E. (Rick) Seigler; William Wu Shen (IBM J. Res. Dev., 1999)

3DIC system design impact, challenge and solutions. - William Wu Shen (ISPD, 2014)

A 1 Tbit/s Bandwidth 1024 b PLL/DLL-Less eDRAM PHY Using 0.3 V 0.105 mW/Gbps Low-Swing IO for CoWoS Application. - Mu-Shan Lin; Chien-Chun Tsai; Chih-Hsien Chang; Wen-Hung Huang; Ying-Yu Hsu; Shu-Chun Yang; Chin-Ming Fu; Mao-Hsuan Chou; Tien-Chien Huang; Ching-Fang Chen; Tze-Chiang Huang; Saman Adham; et al. (IEEE J. Solid State Circuits, 2014)