The Effect of Compiler Optimizations on Available Parallelism in Scalar Programs. - Scott A. Mahlke; Nancy J. Warter; William Y. Chen; Pohua P. Chang; Wen-mei W. Hwu (ICPP (2), 1991)

Comparing Static and Dynamic Code Scheduling for Multiple-Instruction-Issue Processors. - Pohua P. Chang; William Y. Chen; Scott A. Mahlke; Wen-mei W. Hwu (MICRO, 1991)

Data Access Microarchitectures for Superscalar Processors with Compiler-Assisted Data Prefetching. - William Y. Chen; Scott A. Mahlke; Pohua P. Chang; Wen-mei W. Hwu (MICRO, 1991)

Sentinel Scheduling for VLIW and Superscalar Processors. - Scott A. Mahlke; William Y. Chen; Wen-mei W. Hwu; B. Ramakrishna Rau; Michael S. Schlansker (ASPLOS, 1992)

Tolerating First Level Memory Access Latency in High-Performance Systems. - William Y. Chen; Scott A. Mahlke; Wen-mei W. Hwu (ICPP (1), 1992)

Tolerating data access latency with register preloading. - William Y. Chen; Scott A. Mahlke; Wen-mei W. Hwu; Tokuzo Kiyohara; Pohua P. Chang (ICS, 1992)

Using Profile Information to Assist Advaced Compiler Optimization and Scheduling. - William Y. Chen; Roger A. Bringmann; Scott A. Mahlke; Sadun Anik; Tokuzo Kiyohara; Nancy J. Warter; Daniel M. Lavery; Wen-mei W. Hwu; Richard E. Hank; John C. Gyllenhaal (LCPC, 1992)

An efficient architecture for loop based data preloading. - William Y. Chen; Roger A. Bringmann; Scott A. Mahlke; Richard E. Hank; James E. Sicolo (MICRO, 1992)

Effective compiler support for predicated execution using the hyperblock. - Scott A. Mahlke; David C. Lin; William Y. Chen; Richard E. Hank; Roger A. Bringmann (MICRO, 1992)

Compiler Code Transformations for Superscalar-Based High Performance Systems. - Scott A. Mahlke; William Y. Chen; John C. Gyllenhaal; Wen-mei W. Hwu (SC, 1992)

Profile-guided Automatic Inline Expansion for C Programs. - Pohua P. Chang; Scott A. Mahlke; William Y. Chen; Wen-mei W. Hwu (Softw. Pract. Exp., 1992)

Register Connection: A New Approach to Adding Registers into Instruction Set Architectures. - Tokuzo Kiyohara; Scott A. Mahlke; William Y. Chen; Roger A. Bringmann; Richard E. Hank; Sadun Anik; Wen-mei W. Hwu (ISCA, 1993)

The Effect of Code Expanding Optimizations on Instruction Cache Design. - William Y. Chen; Pohua P. Chang; Thomas M. Conte; Wen-mei W. Hwu (IEEE Trans. Computers, 1993)

The superblock: An effective technique for VLIW and superscalar compilation. - Wen-mei W. Hwu; Scott A. Mahlke; William Y. Chen; Pohua P. Chang; Nancy J. Warter; Roger A. Bringmann; Roland G. Ouellette; Richard E. Hank; Tokuzo Kiyohara; Grant E. Haab; John G. Holm; Daniel M. Lavery (J. Supercomput., 1993)

Sentinel Scheduling for VLIW and Superscalar Processors. - Scott A. Mahlke; William Y. Chen; Roger A. Bringmann; Richard E. Hank; Wen-mei W. Hwu; B. Ramakrishna Rau; Michael S. Schlansker (ACM Trans. Comput. Syst., 1993)

Dynamic Memory Disambiguation Using the Memory Conflict Buffer. - David M. Gallagher; William Y. Chen; Scott A. Mahlke; John C. Gyllenhaal; Wen-mei W. Hwu (ASPLOS, 1994)

Profile-assisted instruction scheduling. - William Y. Chen; Scott A. Mahlke; Nancy J. Warter; Sadun Anik; Wen-mei W. Hwu (Int. J. Parallel Program., 1994)

The Importance of Prepass Code Scheduling for Superscalar and Superpipelined Processors. - Pohua P. Chang; Daniel M. Lavery; Scott A. Mahlke; William Y. Chen; Wen-mei W. Hwu (IEEE Trans. Computers, 1995)

Three Architecutral Models for Compiler-Controlled Speculative Execution. - Pohua P. Chang; Nancy J. Warter; Scott A. Mahlke; William Y. Chen; Wen-mei W. Hwu (IEEE Trans. Computers, 1995)

IMPACT: An Architectural Framework for Multiple-Instruction-Issue Processors. - Pohua P. Chang; Scott A. Mahlke; William Y. Chen; Nancy J. Warter; Wen-mei W. Hwu (25 Years ISCA: Retrospectives and Reprints, 1998)

The Intel IA-64 Compiler Code Generator. - Jay Bharadwaj; William Y. Chen; Weihaw Chuang; Gerolf Hoflehner; Kishore N. Menezes; Kalyan Muthukumar; Jim Pierce (IEEE Micro, 2000)