An Algorithm Adapted Autonomous Controlling Concept for a Parallel Single-Chip Digital Signal Processor. - Johannes Kneip; Mladen Berekovic; Jens Peter Wittenburg; Willm Hinrichs; Peter Pirsch (J. VLSI Signal Process., 1997)

Realization of a Programmable Parallel DSP for High Performance Image Processing Applications. - Jens Peter Wittenburg; Willm Hinrichs; Johannes Kneip; Martin Ohmacht; Mladen Berekovic; Hanno Lieske; Helge Kloos; Peter Pirsch (DAC, 1998)

HiPAR-DSP: Ein 1.3 GOPS Multimedia Signalprozessor. - Jens Peter Wittenburg; Willm Hinrichs; Martin Ohmacht; Hanno Lieske; Helge Kloos; Peter Pirsch (ARCS, 1999)

A 1.3-GOPS parallel DSP for high-performance image-processing applications. - Willm Hinrichs; Jens Peter Wittenburg; Hanno Lieske; Helge Kloos; Martin Ohmacht; Peter Pirsch (IEEE J. Solid State Circuits, 2000)

HiPAR-DSP 16, a scalable highly parallel DSP core for system on a chip video- and image processing applications. - Helge Kloos; Jens Peter Wittenburg; Willm Hinrichs; Hanno Lieske; Lars Friebe; C. Klar; Peter Pirsch (ICASSP, 2002)

A multi DSP board for real time SAR processing using the HiPAR-DSP 16. - Christian Simon-Klar; Lars Friebe; Helge Kloos; Hanno Lieske; Willm Hinrichs; Peter Pirsch (IGARSS, 2002)

A compact and flexible multi-DSP system for real-time SAR applications. - Stefan Langemeyer; Helge Kloos; Christian Simon-Klar; Lars Friebe; Willm Hinrichs; Hanno Lieske; Peter Pirsch (IGARSS, 2003)