Initial condition transient suppression for two dimensional recursive digital filters. - Winser E. Alexander (ICASSP, 1984)

B-HIVE: a heterogeneous, interconnected, versatile and expandable multicomputer system. - Dharma P. Agrawal; Winser E. Alexander (SIGARCH Comput. Archit. News, 1984)

Derivation and stability analysis of multidimensional IIR block digital filters. - Chwen-Jye Ju; Winser E. Alexander (ICASSP, 1987)

A Multiprocessor Architecture for Two-Dimensional Digital Filters. - Jung H. Kim; Winser E. Alexander (IEEE Trans. Computers, 1987)

Boundary value transient suppression for N-D digital systems. - Winser E. Alexander; William W. Edmonson (ICASSP, 1988)

Stability analysis of the fast RLS adaptation algorithm. - Daehoon Kim; Winser E. Alexander (ICASSP, 1988)

A novel VLSI architecture for the real-time implementation of 2-D signal processing systems. - Seong-Mo Park; Winser E. Alexander; Jung H. Kim; William E. Batchelor; William T. Krakow (ICCD, 1988)

Multiprocessor implementation of 2-D denominator-separable digital filters for real-time processing. - Mohamed-Yahia Dabbagh; Winser E. Alexander (IEEE Trans. Acoust. Speech Signal Process., 1989)

Mean square error analysis for the fast LMS-sine algorithm. - M. A. Khasawneh; Winser E. Alexander (ICASSP, 1990)

Sampling error analysis in perfect reconstruction transmultiplexers. - Hatice Örün Öztürk; Winser E. Alexander (ICASSP, 1991)

Parallel inverse QR decomposition. - Hongyu Xu; Winser E. Alexander (ACM Southeast Regional Conference, 1992)

Adaptive state space filtering with FIR convergence behaviour. - William W. Edmonson; Winser E. Alexander; Mohamed F. Chouikha (ICASSP, 1992)

Curvature estimation and unique corner point detection for boundary representation. - Kwanghoon Sohn; Winser E. Alexander; Jung H. Kim; Yonghoon Kim; Wesley E. Snyder (ICRA, 1992)

Fault Diagnosis in Analog Circuits Using Element Modulation. - Alvernon Walker; Winser E. Alexander; Parag K. Lala (IEEE Des. Test Comput., 1992)

Block Data Processing Using Commercial Processors. - Kenneth N. Ellis; Winser E. Alexander (ICPP (1), 1994)

A Programmable Simulator for Analyzing the Block Data Flow Architecture. - Sean Alexandre; Winser E. Alexander; Douglas S. Reeves (MASCOTS, 1994)

A Constrained Regularization Approach to Robust Corner Detection. - Kwanghoon Sohn; Winser E. Alexander; Jung H. Kim; Wesley E. Snyder (IEEE Trans. Syst. Man Cybern. Syst., 1994)

Real-Time Implementation of the Kalman Filter Using the Block Data Parallel Architecture. - Sonetra Howard; Winser E. Alexander (PDPTA, 1996)

Matrix Inversion on a Scalable Distributed Memory Parallel Architectur. - Vincent C. Wilburn; Sonetra Howard; Winser E. Alexander (PDPTA, 1996)

Parallel image processing with the block data parallel architecture. - Winser E. Alexander; Douglas S. Reeves; Clay S. Gloster Jr. (Proc. IEEE, 1996)

An optimum solution for scale-invariant object recognition based on the multiresolution approximation. - Sung H. Yoon; Jung H. Kim; Winser E. Alexander; Seong M. Park; Kwang H. Sohn (Pattern Recognit., 1998)

A mean field annealing approach to robust corner detection. - Kwanghoon Sohn; Jung H. Kim; Winser E. Alexander (IEEE Trans. Syst. Man Cybern. Part B, 1998)

Parallel image processin gwith the block data paralel architecture. - Winser E. Alexander; Douglas S. Reeves; Clay S. Gloster Jr. (IBM J. Res. Dev., 2000)

Scalable image coding for interactive image communication over networks. - Sung H. Yoon; Ji H. Lee; Winser E. Alexander (VCIP, 2001)

Region-based scalable coding for video communications. - Ji H. Lee; Sung H. Yoon; Winser E. Alexander (VCIP, 2002)

Dual clock rate block data parallel architecture. - An-Te Deng; Winser E. Alexander (ISCAS (4), 2003)

Medical image compression using post-segmentation approach. - Sung H. Yoon; Ji H. Lee; Jung H. Kim; Winser E. Alexander (ICASSP (5), 2004)

Free Energy Analysis on the Coding Region of the Individual Genes of Saccharomyces cerevisiae. - Chuanhua Xing; Donald L. Bitzer; Winser E. Alexander; Anne-Marie Stomp; Mladen A. Vouk (EMBC, 2006)

Pipelined ALU for Signal Processing to Implement Interval Arithmetic. - Ruchir Gupte; William W. Edmonson; Senanu Ocloo; Winser E. Alexander (SiPS, 2006)

Automated Architectural Exploration for Signal Processing Algorithms. - Ramsey Hourani; Ravi Jenkal; W. Rhett Davis; Winser E. Alexander (SiPS, 2006)

The Use of Interval Methods in Signal Processing and Control for Systems Biology. - William W. Edmonson; Senanu Ocloo; Cranos Williams; Winser E. Alexander (FOCI, 2007)

An Implementation of a Biological Neural Model using Analog-Digital Integrated Circuits. - Gary Charles; Christal Gordon; Winser E. Alexander (BMAS, 2008)

Automated Design Space Exploration for DSP Applications. - Ramsey Hourani; Ravi Jenkal; W. Rhett Davis; Winser E. Alexander (J. Signal Process. Syst., 2009)

Block Floating Point Interval ALU for Digital Signal Processing. - Sandeep Hattangady; William W. Edmonson; Winser E. Alexander (Reliab. Comput., 2011)

A Dataflow Framework for DSP Algorithm Refinement. - Youngsoo Kim; Winser E. Alexander; William W. Edmonson (ISVLSI, 2012)

Hardware implementation of IIR digital filters for programmable devices. - Ramsey Hourani; Hazem Alassaly; Winser E. Alexander (ICECS, 2013)

Acceleration of Synthetic Aperture Radar (SAR) Algorithms using Field Programmable Gate Arrays (FPGAs) (Abstract Only). - Youngsoo Kim; William Harding; Clay S. Gloster Jr.; Winser E. Alexander (FPGA, 2015)