Low-power 14-bit current steering DAC, for ADSL2+/CO applications in 0.13μm CMOS. - Dario Giotta; Peter Pessl; Martin Clara; Wolfgang Klatzer; Richard Gaggl (ESSCIRC, 2004)

Nonlinear distortion in current-steering D/A-converters due to asymmetrical switching errors. - Martin Clara; Andreas Wiesbauer; Wolfgang Klatzer (ISCAS (1), 2004)

A 1.5V 200MS/s 13b 25mW DAC with Randomized Nested Background Calibration in 0.13μm CMOS. - Martin Clara; Wolfgang Klatzer; Berthold Seger; Antonio Di Giandomenico; Luca Gori (ISSCC, 2007)

A 1.5V 13bit 130-300MS/s self-calibrated DAC with active output stage and 50MHz signal bandwidth in 0.13μm CMOS. - Martin Clara; Wolfgang Klatzer; Daniel Gruber; Arnold Marak; Berthold Seger; Wolfgang Pribyl (ESSCIRC, 2008)