Towards a Rapid Prototyping Framework for Architecture Exploration in Embedded Systems. - Martin Jankela; Wolfgang Puffitsch; Wolfgang Huber (WISES, 2004)

picoJava-II in an FPGA. - Wolfgang Puffitsch; Martin Schoeberl (JTRES, 2007)

Decoupled root scanning in multi-processor systems. - Wolfgang Puffitsch (CASES, 2008)

Non-blocking root scanning for real-time garbage collection. - Wolfgang Puffitsch; Martin Schoeberl (JTRES, 2008)

Non-blocking object copy for real-time garbage collection. - Martin Schoeberl; Wolfgang Puffitsch (JTRES, 2008)

Data caching, garbage collection, and the Java memory model. - Wolfgang Puffitsch (JTRES, 2009)

Towards Time-Predictable Data Caches for Chip-Multiprocessors. - Martin Schoeberl; Wolfgang Puffitsch; Benedikt Huber (SEUS, 2009)

Worst-Case Analysis of Heap Allocations. - Wolfgang Puffitsch; Benedikt Huber; Martin Schoeberl (ISoLA (2), 2010)

WCET driven design space exploration of an object cache. - Benedikt Huber; Wolfgang Puffitsch; Martin Schoeberl (JTRES, 2010)

Worst-case execution time analysis for a Java processor. - Martin Schoeberl; Wolfgang Puffitsch; Rasmus Ulslev Pedersen; Benedikt Huber (Softw. Pract. Exp., 2010)

Nonblocking real-time garbage collection. - Martin Schoeberl; Wolfgang Puffitsch (ACM Trans. Embed. Comput. Syst., 2010)

Towards a Time-predictable Dual-Issue Microprocessor: The Patmos Approach. - Martin Schoeberl; Pascal Schleuniger; Wolfgang Puffitsch; Florian Brandner; Christian W. Probst (PPES, 2011)

Hard real-time garbage collection for a Java chip multi-processor. - Wolfgang Puffitsch (JTRES, 2011)

A Scipt Language-supported Approach to ARGESIM Benchmark C14 'Supply Chain' in Enterprise Dynamics. - Philipp Gutwenger; Do Duc Hoa; Wolfgang Puffitsch; Shabnam Tauböck (Simul. Notes Eur., 2011)

On the scalability of time-predictable chip-multiprocessing. - Wolfgang Puffitsch; Martin Schoeberl (JTRES, 2012)

Worst-case execution time analysis-driven object cache design. - Benedikt Huber; Wolfgang Puffitsch; Martin Schoeberl (Concurr. Comput. Pract. Exp., 2012)

Explicit precedence constraints in safety-critical Java. - Wolfgang Puffitsch; Eric Noulard; Claire Pagetti (JTRES, 2013)

Chip-multiprocessor hardware locks for safety-critical Java. - Tórur Biskopstø Strøm; Wolfgang Puffitsch; Martin Schoeberl (JTRES, 2013)

Mapping a multi-rate synchronous language to a many-core processor. - Wolfgang Puffitsch; Eric Noulard; Claire Pagetti (IEEE Real-Time and Embedded Technology and Applications Symposium, 2013)

Design and analysis of a hard real-time garbage collector for a Java chip multi-processor. - Wolfgang Puffitsch (Concurr. Comput. Pract. Exp., 2013)

Data cache organization for accurate timing analysis. - Martin Schoeberl; Benedikt Huber; Wolfgang Puffitsch (Real Time Syst., 2013)

A Method Cache for Patmos. - Philipp Degasperi; Stefan Hepp; Wolfgang Puffitsch; Martin Schoeberl (ISORC, 2014)

A Time-Predictable Memory Network-on-Chip. - Martin Schoeberl; David Vh Chong; Wolfgang Puffitsch; Jens Sparsø (WCET, 2014)

Message Passing on a Time-predictable Multicore Processor. - Rasmus Bo Sørensen; Wolfgang Puffitsch; Martin Schoeberl; Jens Sparsø (ISORC, 2015)

Safety-Critical Java on a Time-Predictable Processor. - Stephan Erbs Korsholm; Martin Schoeberl; Wolfgang Puffitsch (JTRES, 2015)

Fernando: An Educational Ahead-of-Time Bytecode Compiler. - Wolfgang Puffitsch (JTRES, 2015)

Time-division multiplexing vs network calculus: a comparison. - Wolfgang Puffitsch; Rasmus Bo Sørensen; Martin Schoeberl (RTNS, 2015)

Persistence-based branch misprediction bounds for WCET analysis. - Wolfgang Puffitsch (SAC, 2015)

T-CREST: Time-predictable multi-core architecture for embedded systems. - Martin Schoeberl; Sahar Abbaspour; Benny Akesson; Neil C. Audsley; Raffaele Capasso; Jamie Garside; Kees Goossens; Sven Goossens; Scott Hansen; Reinhold Heckmann; Stefan Hepp; Benedikt Huber; et al. (J. Syst. Archit., 2015)

Off-line mapping of multi-rate dependent task sets to many-core platforms. - Wolfgang Puffitsch; Eric Noulard; Claire Pagetti (Real Time Syst., 2015)

Efficient Worst-Case Execution Time Analysis of Dynamic Branch Prediction. - Wolfgang Puffitsch (ECRTS, 2016)

Time-Predictable Virtual Memory. - Wolfgang Puffitsch; Martin Schoeberl (ISORC, 2016)

TACLeBench: A Benchmark Collection to Support Worst-Case Execution Time Research. - Heiko Falk; Sebastian Altmeyer; Peter Hellinckx; Björn Lisper; Wolfgang Puffitsch; Christine Rochange; Martin Schoeberl; Rasmus Bo Sørensen; Peter Wägemann; Simon Wegener (WCET, 2016)

Improving Performance of Single-Path Code through a Time-Predictable Memory Hierarchy. - Bekim Cilku; Wolfgang Puffitsch; Daniel Prokesch; Martin Schoeberl; Peter P. Puschner (ISORC, 2017)

Hardware locks for a real-time Java chip multiprocessor. - Tórur Biskopstø Strøm; Wolfgang Puffitsch; Martin Schoeberl (Concurr. Comput. Pract. Exp., 2017)

Patmos: a time-predictable microprocessor. - Martin Schoeberl; Wolfgang Puffitsch; Stefan Hepp; Benedikt Huber; Daniel Prokesch (Real Time Syst., 2018)