Hardware Implementation of a Multiuser Detection Scheme Based on Recurrent Neural Networks. - Wolfgang Schlecker; Achim Engelhart; Werner G. Teich; Hans-Jörg Pfleiderer (FPL, 2002)

An Interactive Systemc Course Featuring Real-Time Online Compiling and Analysis. - Oliver A. Pfänder; Christophe Layer; Wolfgang Schlecker; Hans-Jörg Pfleiderer (EDUTECH, 2005)

Iterative FPGA Implementation Easing Safety Certification for Mixed-Criticality Embedded Real-Time Systems. - Daniel Münch; Michael Paulitsch; Michael Honold; Wolfgang Schlecker; Andreas Herkersdorf (DSD, 2014)

Digital full-band linearization of wideband direct-conversion receiver for radar and communications applications. - Markus Allén; Jaakko Marttila; Mikko Valkama; Simran Singh; Michael Epp; Wolfgang Schlecker (ACSSC, 2015)

Low-complexity digital correction of 4-channel time-interleaved ADC frequency response mismatch using adaptive I/Q signal processing. - Simran Singh; Michael Epp; Wolfgang Schlecker; Mikko Valkama (GlobalSIP, 2015)

Frequency Response Mismatches in 4-channel Time-Interleaved ADCs: Analysis, Blind Identification, and Correction. - Simran Singh; Lauri Anttila; Michael Epp; Wolfgang Schlecker; Mikko Valkama (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

Frequency Response Mismatch Analysis in Time-Interleaved Analog I/Q Processing and ADCs. - Simran Singh; Mikko Valkama; Michael Epp; Wolfgang Schlecker (IEEE Trans. Circuits Syst. II Express Briefs, 2015)

Digitally Enhanced Wideband I/Q Downconversion Receiver With 2-Channel Time-Interleaved ADCs. - Simran Singh; Mikko Valkama; Michael Epp; Wolfgang Schlecker (IEEE Trans. Circuits Syst. II Express Briefs, 2016)