9.5 A Sub-1V, 50mV Dropout LDO Using Pseudo-Impedance Buffer with Phase-Margin Improvement Design. - Young-Jun Jeon; Jeong-Hun Kim; Won-Gyu Kim; Sung-Wan Hong (ISSCC, 2025)

21.6 A 2A Fully Analog Distribution LDO with Noise Immunity for an SoC. - Jeong-Hun Kim; Young-Jun Jeon; Won-Gyu Kim; Jaeseung Lee; Jun-Hyeok Yang; Sung-Wan Hong (ISSCC, 2025)

A 1.8-5.5-V LDO-BGR System With LACM Buffer for High PSRR in Camera Applications. - Won-Gyu Kim; Sang-Yun Nam; Young-Jun Jeon; Sung-Wan Hong (IEEE Trans. Circuits Syst. II Express Briefs, 2025)