0.18um CMOS integrated chipset for 5.8GHz DSRC systems with +10dBm output power. - Sangho Shin; Seokoh Yun; Sanghyun Cho; Jongmoon Kim; Minseok Kang; Wonkab Oh; Sung-Mo Kang (ISCAS, 2008)

A true single SoC for UHF mobile RFID reader. - Jongmoon Kim; Seokoh Yun; Wonkab Oh; Minsu Kil; Sanghyun Cho (CICC, 2011)

A 915 MHz, 499 μW, -99 dBm, and 100 kbps BFSK Direct Conversion Receiver. - Keun-Mok Kim; Eui-Rim Jeong; Kyung-Sik Choi; Subin Kim; Byeonghun Yun; Hyunki Jung; Wonkab Oh; Jinho Ko; Sang-Gug Lee 001 (ESSCIRC, 2019)

A -123-dBm Sensitivity Split-Channel BFSK Reconfigurable Data/Wake-Up Receiver for Low-Power Wide-Area Networks. - Keun-Mok Kim; Hyun-Gi Seok; Oh-Yong Jung; Kyung-Sik Choi; Byeonghun Yun; Subin Kim; Wonkab Oh; Eui-Rim Jeong; Jinho Ko; Sang-Gug Lee 001 (IEEE J. Solid State Circuits, 2021)

An LPWAN Radio with a Reconfigurable Data/Duty-Cycled-Wake-Up Receiver. - Keun-Mok Kim; Kyung-Sik Choi; Hyunki Jung; Byeonghun Yun; Subin Kim; Wonkab Oh; Eui-Soo Lee; Sujin Park; Eui-Rim Jeong; Jinho Ko; Sang-Gug Lee 001 (ISSCC, 2022)