Performance analysis of wideband DS-CDMA cellular system over Nakagami fading channels. - Wonsub Kim; Jinsoo Park (VTC Fall, 2001)

SCC based modulo scheduling for coarse-grained reconfigurable processors. - Wonsub Kim; Donghoon Yoo; Haewoo Park; Minwook Ahn (FPT, 2012)

A scalable scheduling algorithm for coarse-grained reconfigurable architecture. - Haewoo Park; Wonsub Kim; Donghoon Yoo; Soojung Ryu; Jeongwook Kim (ICCE, 2013)

Fast modulo scheduler utilizing patternized routes for coarse-grained reconfigurable architectures. - Wonsub Kim; Yoonseo Choi; Haewoo Park (ACM Trans. Archit. Code Optim., 2013)

Extended RVS characterisation of STT-MRAM devices: Enabling detection of AP/P switching and breakdown. - Barry J. O'Sullivan; Simon Van Beek; Philippe J. Roussel; Sidharth Rao; Wonsub Kim; S. Couet; Johan Swerts; Farrukh Yasin; Dimitri Crotti; Dimitri Linten; Gouri Sankar Kar (IRPS, 2018)

Online Speech Dereverberation Using RLS-WPE Based on a Full Spatial Correlation Matrix Integrated in a Speech Enhancement System. - Jun Hyung Kim; Jazzson Park; Minwook Ahn; Yeonbok Lee; Wonsub Kim; Hyung-Min Park (IWAENC, 2018)

SOT-MRAM 300MM Integration for Low Power and Ultrafast Embedded Memories. - Kevin Garello; Kevin Garello Yasin; S. Couet; Laurent Souriau; Johan Swerts; Sidharth Rao; Simon Van Beek; Wonsub Kim; Enlong Liu; Shreya Kundu; Diana Tsvetanova; Kris Croes; et al. (VLSI Circuits, 2018)

SOT-MRAM 300mm integration for low power and ultrafast embedded memories. - Kevin Garello; Farrukh Yasin; S. Couet; Laurent Souriau; Johan Swerts; Sidharth Rao; Simon Van Beek; Wonsub Kim; Enlong Liu; Shreya Kundu; Diana Tsvetanova; N. Jossart; et al. (CoRR, 2018)

AIX: A high performance and energy efficient inference accelerator on FPGA for a DNN-based commercial speech recognition. - Minwook Ahn; Seok Joong Hwang; Wonsub Kim; Seungrok Jung; Yeonbok Lee; Mookyoung Chung; Woohyung Lim; Young Joon Kim (DATE, 2019)

Manufacturable 300mm platform solution for Field-Free Switching SOT-MRAM. - Kevin Garello; Farrukh Yasin; Hubert Hody; S. Couet; Laurent Souriau; Shamin H. Sharifi; Johan Swerts; Robert Carpenter; Sidharth Rao; Wonsub Kim; J. Wu; K. K. V. Sethu; et al. (VLSI Circuits, 2019)