Fast and accurate quasi-three-dimensional capacitance determination of multilayer VLSI interconnects. - Woojin Jin; Yungseon Eo; William R. Eisenstadt; Jongin Shim (IEEE Trans. Very Large Scale Integr. Syst., 2001)

Upper/Lower Boundary Estimation of Package Interconnect Parasitics for Chip-Package Co-Design. - Eunseok Song; Heeseok Lee; Jungtae Lee; Woojin Jin; Kiwon Choi; Sa-Yoon Kang (ISQED, 2007)