A Custom IC Layout Generation Engine Based on Dynamic Templates and Grids. - Taeho Shin; Dongjun Lee; Dongwhee Kim; Gaeryun Sung; Wookjin Shin; Yunseong Jo; Hyungjoo Park; Jaeduk Han (CoRR, 2022)

LAYGO2: A Custom Layout Generation Engine Based on Dynamic Templates and Grids for Advanced CMOS Technologies. - Taeho Shin; Dongjun Lee; Dongwhee Kim; Gaeryun Sung; Wookjin Shin; Yunseong Jo; Hyungjoo Park; Jaeduk Han (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

A Variation-Tolerant Voltage-Mode Transmitter With 3+1 Tap FFE in 28-nm CMOS. - Wookjin Shin; Hyeongmin Seo; Sangwan Lee; Dong-Ho Choi; Young-Ho Kwak; Soon-Jae Won; Jaeduk Han (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

WITCH: WeIghTed Coding Scheme for Crosstalk Reduction in High Bandwidth Memory. - Seoyoon Jang; Sangouk Jeon; Kwanghyun Shin; Dongkwon Lee; Hankyu Chi; Wookjin Shin; Changhyun Pyo; Jaeha Kim; Dongsuk Jeon (ASP-DAC, 2025)

A Variation-Robust 20-Gb/s Wireline Transceiver With Real-Time Calibration in 28-nm CMOS. - Sangwan Lee; Hyeongmin Seo; Wookjin Shin; Dongju Yang; Gaeryun Sung; Sanghun Lee; Dong-Ho Choi; Young-Ho Kwak; Soon-Jae Won; Ickhyun Song; Jaeduk Han (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)