IP2 calibrator using common mode feedback circuitry. - Woonyun Kim; Sung-Gi Yang; Yeon-kug Moon; Jinhyuck Yu; Heeseon Shin; Woo-Seung Choo; Byeong-Ha Park (ESSCIRC, 2005)

A direct conversion receiver with an IP2 calibrator for CDMA/PCS/GPS/AMPS applications. - Woonyun Kim; Sung-Gi Yang; Jinhyuck Yu; Heeseon Shin; Woo-Seung Choo; Byeong-Ha Park (IEEE J. Solid State Circuits, 2006)

A 3.6mW differential common-gate CMOS LNA with positive-negative feedback. - Sanghyun Woo; Woonyun Kim; Chang-Ho Lee; Kyutae Lim; Joy Laskar (ISSCC, 2009)

A Linear Multi-Mode CMOS Power Amplifier With Discrete Resizing and Concurrent Power Combining Structure. - Jihwan Kim; Youngchang Yoon; Hyungwook Kim; Kyu Hwan An; Woonyun Kim; Hyun-Woong Kim; Chang-Ho Lee; Kevin T. Kornegay (IEEE J. Solid State Circuits, 2011)

A Low Power and Wide Range Programmable Clock Generator With a High Multiplication Factor. - Jaehyouk Choi; Stephen T. Kim; Woonyun Kim; Kwan-Woo Kim; Kyutae Lim; Joy Laskar (IEEE Trans. Very Large Scale Integr. Syst., 2011)

A Fully-Integrated High-Power Linear CMOS Power Amplifier With a Parallel-Series Combining Transformer. - Jihwan Kim; Woonyun Kim; Hamhee Jeon; Yan-Yu Huang; Youngchang Yoon; Hyungwook Kim; Chang-Ho Lee; Kevin T. Kornegay (IEEE J. Solid State Circuits, 2012)

A Spur Suppression Technique Using an Edge-Interpolator for a Charge-Pump PLL. - Jaehyouk Choi; Woonyun Kim; Kyutae Lim (IEEE Trans. Very Large Scale Integr. Syst., 2012)

An EDGE/GSM Quad-Band CMOS Power Amplifier. - Woonyun Kim; Ki Seok Yang; Jeonghu Han; Jaejoon Chang; Chang-Ho Lee (IEEE J. Solid State Circuits, 2014)