Design of a Wireless Router with Virtual Channel Fault Tolerant in WiNoC. - Yiming Ouyang; Wu Zhou 007; Sheng Li; Zhilu Wang; Huaguo Liang; Gaoming Du (J. Circuits Syst. Comput., 2020)

MMNNN: A tree-based Multicast Mechanism for NoC-based deep Neural Network accelerators. - Yiming Ouyang; Feiyang Tang; Chunlei Hu; Wu Zhou 007; Qi Wang 027 (Microprocess. Microsystems, 2021)

REE: Reconfigurable and energy-efficient router architecture in wireless network-on-chip. - Yiming Ouyang; Dongyu Xu; Zhimou Chen; Rongjing Chen; Wu Zhou 007; Huaguo Liang (Microelectron. J., 2022)

A router architecture with dual input and dual output channels for Networks-on-Chip. - Wu Zhou 007; Yiming Ouyang; Yingchun Lu; Huaguo Liang (Microprocess. Microsystems, 2022)

A transparent virtual channel power gating method for on-chip network routers. - Wu Zhou 007; Yiming Ouyang; Jianhua Li 003; Dongyu Xu (Integr., 2023)

Energy-Efficient Multiple Network-on-Chip Architecture With Bandwidth Expansion. - Wu Zhou 007; Yiming Ouyang; Dongyu Xu; Zhengfeng Huang; Huaguo Liang; Xiaoqing Wen (IEEE Trans. Very Large Scale Integr. Syst., 2023)

Dynamic detection of wireless interface faults and fault-tolerant routing algorithm in WiNoC. - Yiming Ouyang; Dongyu Xu; Chang Qian; Wu Zhou 007; Qi Wang 027; Huaguo Liang (Integr., 2023)

Improving power and performance of on-chip network through virtual channel sharing and power gating. - Dongyu Xu; Yiming Ouyang; Wu Zhou 007; Huaguo Liang (Integr., 2023)

RMC_NoC: A Reliable On-Chip Network Architecture With Reconfigurable Multifunctional Channel. - Dongyu Xu; Yiming Ouyang; Wu Zhou 007; Zhengfeng Huang; Huaguo Liang; Xiaoqing Wen (IEEE Trans. Very Large Scale Integr. Syst., 2023)

DBU-PG: energy-efficient noc design using dual-buffering power gating. - Yiming Ouyang; Cheng Cao; Dongyu Xu; Wu Zhou 007; Zhengfeng Huang; Huaguo Liang (J. Supercomput., 2024)

THCA: Three-Hop Congestion Awareness Routing Mechanism in WiNoC. - Dongyu Xu; Tianbao Zhang; Wu Zhou 007 (J. Circuits Syst. Comput., 2025)

Identifying Optimal Workload Offloading Partitions for CPU-PIM Graph Processing Accelerators. - Sheng Xu; Chun Li; Le Luo 002; Wu Zhou 007; Liang Yan; Xiaoming Chen 003 (IEEE Trans. Very Large Scale Integr. Syst., 2025)

RHT_NoC: A Reconfigurable Hybrid Topology Architecture for Chiplet-Based Multicore System. - Dongyu Xu; Wu Zhou 007; Zhengfeng Huang; Huaguo Liang; Xiaoqing Wen (IEEE Trans. Very Large Scale Integr. Syst., 2025)