10.3 heterogeneous multi-processing quad-core CPU and dual-GPU design for optimal performance, power, and thermal tradeoffs in a 28nm mobile application processor. - Alice Wang; Tsung-Yao Lin; Shichin Ouyang; Wei-Hung Huang; Jidong Wang; Shu-Hsin Chang; Sheng-Ping Chen; Chun-Hsiung Hu; J. C. Tai; Koan-Sin Tan; Meng-Nan Tsou; Ming-Hsien Lee; et al. (ISSCC, 2014)

23.3 A highly integrated smartphone SoC featuring a 2.5GHz octa-core CPU with advanced high-performance and low-power techniques. - Hugh Mair; Gordon Gammie; Alice Wang; Sumanth Gururajarao; Ichiro Lin; HsinChen Chen; Wuan Kuo; Anand Rajagopalan; Wei-Zheng Ge; Rolf Lagerquist; Syed Rahman; C. J. Chung; et al. (ISSCC, 2015)

4.3 A 20nm 2.5GHz ultra-low-power tri-cluster CPU subsystem with adaptive power allocation for optimal mobile SoC performance. - Hugh Mair; Gordon Gammie; Alice Wang; Rolf Lagerquist; C. J. Chung; Sumanth Gururajarao; Ping Kao; Anand Rajagopalan; Anirban Saha; Amit Jain; Ericbill Wang; Shichin Ouyang; et al. (ISSCC, 2016)

3.4 A 10nm FinFET 2.8GHz tri-gear deca-core CPU complex with optimized power-delivery network for mobile SoC performance. - Hugh Mair; Ericbill Wang; Alice Wang; Ping Kao; Yuwen Tsai; Sumanth Gururajarao; Rolf Lagerquist; Jin Son; Gordon Gammie; Gordon Lin; Achuta Thippana; Kent Li; et al. (ISSCC, 2017)