AnalogNets: ML-HW Co-Design of Noise-robust TinyML Models and Always-On Analog Compute-in-Memory Accelerator. - Chuteng Zhou; Fernando García-Redondo; Julian Büchel; Irem Boybat; Xavier Timoneda Comas; S. R. Nandakumar; Shidhartha Das; Abu Sebastian; Manuel Le Gallo; Paul N. Whatmough (CoRR, 2021)

A 64-core mixed-signal in-memory compute chip based on phase-change memory for deep neural network inference. - Manuel Le Gallo; Riduan Khaddam-Aljameh; Milos Stanisavljevic; Athanasios Vasilopoulos; Benedikt Kersting; Martino Dazzi; Geethan Karunaratne; Matthias Braendli; Abhairaj Singh; Silvia M. Mueller; Julian Büchel; Xavier Timoneda Comas; et al. (CoRR, 2022)

ML-HW Co-Design of Noise-Robust TinyML Models and Always-On Analog Compute-in-Memory Edge Accelerator. - Chuteng Zhou; Fernando García-Redondo; Julian Büchel; Irem Boybat; Xavier Timoneda Comas; S. R. Nandakumar; Shidhartha Das; Abu Sebastian; Manuel Le Gallo; Paul N. Whatmough (IEEE Micro, 2022)