OOEM: Object-Oriented Energy Model for Embedded Software IP Reuse. - Yue Xiong; Xuehai Zhou; Xi Li 003; Yuchang Gong (IRI, 2003)

PN-based Formal Modeling and Verification for ASIP Architecture. - Yun Zhu; Xi Li 003; Yuchang Gong; Zhi-Gang Wang (ICESS, 2004)

Compile-Time Energy Reduction Techniques based on Voltage Scaling Characteristic. - Ting Lei; Xi Li 003; Xiao Hu; Xuehai Zhou (IASTED Conf. on Software Engineering, 2005)

Mining X-Ray Images of SARS Patients. - Xuanyang Xie; Xi Li 003; Shouhong Wan; Yuchang Gong (Selected Papers from AusDM, 2006)

A Fast Instruction Set Evaluation Method for ASIP Designs. - Angela Yun Zhu; Xi Li 003; Laurence Tianruo Yang; Jun Yang 002 (EUC, 2006)

Reputation Based Service Selection in Grid Environment. - Qing Ding; Xi Li 003; Xuehai Zhou (CSSE (3), 2008)

Formal Verification of Bypassed Processor Pipelines. - Yanyan Gao 001; Xi Li 003 (ICYCS, 2008)

Formal Verification of Out-of-Order Processor. - Yanyan Gao 001; Xi Li 003 (ICCMS, 2009)

RePro: A Reputation-based Proactive Routing Protocol for the Wireless Mesh Backbone. - Qing Ding; Ming Jiang 014; Xi Li 003; Xuehai Zhou (NCM, 2009)

Trust Management in the P2P Grid. - Qing Ding; Xi Li 003; Ming Jiang 014; Xuehai Zhou (J. Digit. Content Technol. its Appl., 2009)

Reputation-based trust model in Vehicular Ad Hoc Networks. - Qing Ding; Xi Li 003; Ming Jiang 014; Xuehai Zhou (WCSP, 2010)

Regarding Processors and Reconfigurable IP Cores as Services. - Chao Wang 003; Xi Li 003; Peng Chen 004; Junneng Zhang; Xiaojing Feng; Xuehai Zhou (IEEE SCC, 2012)

CRAIS: A Crossbar Based Adaptive Interconnection Scheme. - Chao Wang 003; Xi Li 003; Xuehai Zhou; Xiaojing Feng (ARC, 2012)

Sedna: A Memory Based Key-Value Storage System for Realtime Processing in Cloud. - Dong Dai 001; Xi Li 003; Chao Wang 003; Mingming Sun; Xuehai Zhou (CLUSTER Workshops, 2012)

Cloud Based Short Read Mapping Service. - Dong Dai 001; Xi Li 003; Chao Wang 003; Xuehai Zhou (CLUSTER, 2012)

DTS: Using Dynamic Time-Slice Scaling to Address the OS Problem Incurred by DVFS. - Gangyong Jia; Xuhong Gao; Xi Li 003; Chao Wang 003; Xuehai Zhou (CLUSTER Workshops, 2012)

Cache Promotion Policy Using Re-reference Interval Prediction. - Gangyong Jia; Xi Li 003; Chao Wang 003; Xuehai Zhou; Zongwei Zhu (CLUSTER, 2012)

Memory Affinity: Balancing Performance, Power, Thermal and Fairness for Multi-core Systems. - Gangyong Jia; Xi Li 003; Chao Wang 003; Xuehai Zhou; Zongwei Zhu (CLUSTER, 2012)

Phase Detection for Loop-Based Programs on Multicore Architectures. - Chao Wang 003; Xi Li 003; Dong Dai 001; Gangyong Jia; Xuehai Zhou (CLUSTER, 2012)

CaaS: Core as a service realizing hardware sercices on reconfigurable MPSoCS. - Chao Wang 003; Xi Li 003; Junneng Zhang; Peng Chen 004; Xuehai Zhou (FPL, 2012)

Parallel dataflow execution for sequential programs on reconfigurable hybrid MPSoCs. - Chao Wang 003; Xi Li 003; Xuehai Zhou; Yajun Ha (FPT, 2012)

A task-level OoO framework for heterogeneous systems. - Junneng Zhang; Chao Wang 003; Xi Li 003; Peng Chen 004; Xiaojing Feng; Xuehai Zhou (FPT, 2012)

Share memory aware scheduler: balancing performance and fairness. - Xi Li 003; Gangyong Jia; Yun Chen; Zongwei Zhu; Xuehai Zhou (ACM Great Lakes Symposium on VLSI, 2012)

A Dependency Aware Task Partitioning and Scheduling Algorithm for Hardware-Software Codesign on MPSoCs. - Chunsheng Li; Xi Li 003; Chao Wang 003; Xuehai Zhou; Fangling Zeng (ICA3PP (1), 2012)

Behavior Aware Data Locality for Caches. - Gangyong Jia; Xi Li 003; Chao Wang 003; Xuehai Zhou; Zongwei Zhu (ICPADS, 2012)

Detecting Data Hazards in Multi-Processor System-on-Chips on FPGA. - Chao Wang 003; Xi Li 003; Peng Chen 004; Xiaojing Feng; Junneng Zhang; Xuehai Zhou (IPDPS Workshops, 2012)

FPM: A Flexible Programming Model for MPSoC on FPGA. - Chao Wang 003; Xi Li 003; Junneng Zhang; Peng Chen 004; Xiaojing Feng; Xuehai Zhou (IPDPS Workshops, 2012)

Frequency Affinity: Analyzing and Maximizing Power Efficiency in Multi-core Systems. - Gangyong Jia; Xi Li 003; Chao Wang 003; Xuehai Zhou; Zongwei Zhu (MASCOTS, 2012)

Analyzing Parallelization and Program Performance in Heterogeneous MPSoCs. - Chao Wang 003; Xi Li 003; Junneng Zhang; Gangyong Jia; Peng Chen 004; Xuehai Zhou (MASCOTS, 2012)

A star network approach in heterogeneous multiprocessors system on chip. - Chao Wang 003; Xi Li 003; Junneng Zhang; Xuehai Zhou; Aili Wang 003 (J. Supercomput., 2012)

SmartClass: A Services-Oriented Approach for University Resource Scheduling. - Aili Wang 003; Chao Wang 003; Xi Li 003; Xuehai Zhou (IEEE SCC, 2013)

Pipeline Optimization for Loops on Reconfigurable Platform. - Qi Guo 001; Chao Wang 003; Xuehai Zhou; Xi Li 003 (ARC, 2013)

Acceleration of the long read mapping on a PC-FPGA architecture (abstract only). - Peng Chen 004; Chao Wang 003; Xi Li 003; Xuehai Zhou (FPGA, 2013)

Custom instruction generation and mapping for reconfigurable instruction set processors (abstract only). - Chao Wang 003; Xi Li 003; Huizhen Zhang; Jinsong Ji; Xuehai Zhou (FPGA, 2013)

Genome sequencing using mapreduce on FPGA with multiple hardware accelerators (abstract only). - Chao Wang 003; Xi Li 003; Xuehai Zhou; Jim Martin 001; Ray C. C. Cheung (FPGA, 2013)

Hardware acceleration for the banded Smith-Waterman algorithm with the cycled systolic array. - Peng Chen 004; Chao Wang 003; Xi Li 003; Xuehai Zhou (FPT, 2013)

A FPGA-Based High Performance Acceleration Platform for the Next Generation Long Read Mapping. - Peng Chen 004; Chao Wang 003; Xi Li 003; Xuehai Zhou (HPCC/EUC, 2013)

Group Scheduling for Improving Both CPU and Memory Power Efficiency Simultaneously. - Gangyong Jia; Xi Li 003; Jian Wan 001; Chao Wang 003; Dong Dai 001 (HPCC/EUC, 2013)

An Intelligent Transportation System Using RFID Based Sensors. - Chao Wang 003; Xi Li 003; Aili Wang 003; Feng Yang; Xuehai Zhou (HPCC/EUC, 2013)

SmartMal: A Service-Oriented Behavioral Malware Detection Framework for Smartphones. - Chao Wang 003; Zhizhong Wu; Aili Wang 003; Xi Li 003; Feng Yang; Xuehai Zhou (HPCC/EUC, 2013)

Coordinate Task and Memory Management for Improving Power Efficiency. - Gangyong Jia; Xi Li 003; Jian Wan 001; Chao Wang 003; Dong Dai 001; Congfeng Jiang (ICA3PP (1), 2013)

Power-aware buddy system and task group scheduler. - Xi Li 003; Zongwei Zhu; Gangyong Jia; Xuehai Zhou (ISCAS, 2013)

FPGA implementation of a scheduler supporting parallel dataflow execution. - Junneng Zhang; Chao Wang 003; Xi Li 003; Xuehai Zhou (ISCAS, 2013)

An effective model extraction method with state space compression for model checking SystemC TLM designs. - Yanyan Gao 001; Xi Li 003 (ICSAMOS, 2013)

SOBA: A Services-Oriented Browser Architecture with Distributed URL-Filtering Mechanisms for Teenagers. - Aili Wang 003; Chao Wang 003; Xi Li 003; Xuehai Zhou (SERVICES, 2013)

Coordinate page allocation and thread group for improving main memory power efficiency. - Gangyong Jia; Xi Li 003; Jian Wan 001; Liang Shi 001; Chao Wang 003 (HotPower@SOSP, 2013)

Detecting Associations in Large Dataset on MapReduce. - Dong Dai 001; Xi Li 003; Chao Wang 003; Junneng Zhang; Xuehai Zhou (TrustCom/ISPA/IUCC, 2013)

Static or Dynamic: Trade-Offs for Task Dependency Analysis for Heterogeneous MPSoC. - Qi Guo 001; Chao Wang 003; Xuehai Zhou; Xi Li 003 (TrustCom/ISPA/IUCC, 2013)

A Semantics-based Translation Method for Automated Verification of SystemC TLM Designs. - Yanyan Gao 001; Xi Li 003 (J. Electron. Test., 2013)

Services-oriented URL filtering and verification. - Aili Wang 003; Chao Wang 003; Xi Li 003; Xuehai Zhou; Nadia Nedjah (Int. J. High Perform. Syst. Archit., 2013)

Location-aware private service discovery in pervasive computing environment. - Chen Yu 003; Dezhong Yao 002; Xi Li 003; Yan Zhang 002; Laurence T. Yang; Naixue Xiong; Hai Jin 001 (Inf. Sci., 2013)

Heterothread: hybrid thread level parallelism on heterogeneous multicore architectures. - Chao Wang 003; Xi Li 003; Xuehai Zhou (SIGBED Rev., 2013)

MP-Tomasulo: A Dependency-Aware Automatic Parallel Execution Engine for Sequential Programs. - Chao Wang 003; Xi Li 003; Junneng Zhang; Xuehai Zhou; Xiaoning Nie (ACM Trans. Archit. Code Optim., 2013)

Instruction Extension and Generation for Adaptive Processors. - Chao Wang 003; Xi Li 003; Huizhen Zhang; Liang Shi 001; Xuehai Zhou (ARC, 2014)

Co-processing with dynamic reconfiguration on heterogeneous MPSoC: practices and design tradeoffs (abstract only). - Chao Wang 003; Xi Li 003; Xuehai Zhou; Yunji Chen; Koen Bertels (FPGA, 2014)

Big data genome sequencing on Zynq based clusters (abstract only). - Chao Wang 003; Xi Li 003; Xuehai Zhou; Yunji Chen; Ray C. C. Cheung (FPGA, 2014)

Texture-Directed Mobile GPU Power Management for Closed-Source Games. - Beilei Sun; Xi Li 003; Jiachen Song; Zhinan Cheng; Yuan Xu; Xuehai Zhou (HPCC/CSS/ICESS, 2014)

Temperature-Aware Scheduling Based on Dynamic Time-Slice Scaling. - Gangyong Jia; Youwei Yuan; Jian Wan 001; Congfeng Jiang; Xi Li 003; Dong Dai 001 (ICA3PP (1), 2014)

Application-aware group scheduler for Android. - Zongwei Zhu; Beilei Sun; Xi Li 003; Xuehai Zhou (ICADIWT, 2014)

Behavior Gaps and Relations between Operating System and Applications on Accessing DRAM. - Beilei Sun; Xi Li 003; Zongwei Zhu; Xuehai Zhou (ICECCS, 2014)

A Thread Behavior-Based Memory Management Framework on Multi-core Smartphone. - Zongwei Zhu; Xi Li 003; Hengchang Liu; Cheng Ji 002; Yuan Xu; Xuehai Zhou; Beilei Sun (ICECCS, 2014)

Trade-offs between the sensitivity and the speed of the FPGA-based sequence aligner. - Peng Chen 004; Chao Wang 003; Xi Li 003; Xuehai Zhou; Aili Wang 003; Ray C. C. Cheung (ISIC, 2014)

Kernel-User Space Separation in DRAM Memory. - Xi Li 003; Beilei Sun; Zongwei Zhu; Chao Wang 003; Xuehai Zhou (ISPA, 2014)

Multi-objective aware design flow for coarse-grained systems on chip. - Peng Chen 004; Chao Wang 003; Xi Li 003; Xuehai Zhou (RTCSA, 2014)

PUMA: Pseudo unified memory architecture for single-ISA heterogeneous multi-core systems. - Gangyong Jia; Liang Shi 001; Jian Wan 001; Youwei Yuan; Xi Li 003; Dong Dai 001 (RTCSA, 2014)

Memory power optimization on different memory address mapping schemas. - Zongwei Zhu; Xi Li 003; Chao Wang 003; Xuehai Zhou (RTCSA, 2014)

PseudoNUMA for reducing memory interference in multi-core systems. - Gangyong Jia; Xi Li 003; Youwei Yuan; Jian Wan 001; Congfeng Jiang; Dong Dai 001 (SpringSim (HPS), 2014)

Towards Energy Optimization Based on Delay-Sensitive Traffic for WiFi Network. - Bo Chen 010; Xi Li 003; Xuehai Zhou; Tengfu Liu; Zongwei Zhu (UIC/ATC/ScalCom, 2014)

Memory power optimisation on low-bit multi-access cross memory address mapping schema. - Zongwei Zhu; Xi Li 003; Chao Wang 003; Xuehai Zhou (Int. J. Embed. Syst., 2014)

Amdahl's and Hill-Marty laws revisited for FPGA-based MPSoCs: from theory to practice. - Junneng Zhang; Chao Wang 003; Xi Li 003; Xuehai Zhou; Aili Wang 003; Gangyong Jia; Nadia Nedjah (Int. J. High Perform. Syst. Archit., 2014)

Colored Petri Net model with automatic parallelization on real-time multicore architectures. - Chao Wang 003; Xiaojing Feng; Xi Li 003; Xuehai Zhou; Peng Chen 004 (J. Syst. Archit., 2014)

Accelerating the Next Generation Long Read Mapping with the FPGA-Based System. - Peng Chen 004; Chao Wang 003; Xi Li 003; Xuehai Zhou (IEEE ACM Trans. Comput. Biol. Bioinform., 2014)

Automatic frame rate-based DVFS of game. - Zhinan Cheng; Xi Li 003; Beilei Sun; Ce Gao; Jiachen Song (ASAP, 2015)

A Deep Learning Prediction Process Accelerator Based FPGA. - Qi Yu; Chao Wang 003; Xiang Ma; Xi Li 003; Xuehai Zhou (CCGRID, 2015)

An FPGA-Based Accelerator for Neighborhood-Based Collaborative Filtering Recommendation Algorithms. - Xiang Ma; Chao Wang 003; Qi Yu; Xi Li 003; Xuehai Zhou (CLUSTER, 2015)

SODA: software defined FPGA based accelerators for big data. - Chao Wang 003; Xi Li 003; Xuehai Zhou (DATE, 2015)

RapidPath: Accelerating Constrained Shortest Path Finding in Graphs on FPGA (Abstract Only). - Chao Wang 003; Xi Li 003; Qi Guo 001; Xuehai Zhou (FPGA, 2015)

SAKMA: Specialized FPGA-Based Accelerator Architecture for Data-Intensive K-Means Algorithms. - Fahui Jia; Chao Wang 003; Xi Li 003; Xuehai Zhou (ICA3PP (2), 2015)

Fast approximate hash table using extended counting Bloom filter. - Jinhong Zhou; Chao Wang 003; Xi Li 003; Xuehai Zhou (Int. J. Comput. Sci. Eng., 2015)

CRAIS: A Crossbar-Based Interconnection Scheme on FPGA for Big Data. - Chao Wang 003; Xi Li 003; Xuehai Zhou (J. Comput. Sci. Technol., 2015)

A case study of parallel JPEG encoding on an FPGA. - Chao Wang 003; Xi Li 003; Peng Chen 004; Xuehai Zhou (J. Parallel Distributed Comput., 2015)

Architecture Support for Task Out-of-Order Execution in MPSoCs. - Chao Wang 003; Xi Li 003; Junneng Zhang; Peng Chen 004; Yunji Chen; Xuehai Zhou; Ray C. C. Cheung (IEEE Trans. Computers, 2015)

Heterogeneous Cloud Framework for Big Data Genome Sequencing. - Chao Wang 003; Xi Li 003; Peng Chen 004; Aili Wang 003; Xuehai Zhou; Hong Yu 011 (IEEE ACM Trans. Comput. Biol. Bioinform., 2015)

FreeRider: Non-Local Adaptive Network-on-Chip Routing with Packet-Carried Propagation of Congestion Information. - Shaoli Liu; Tianshi Chen 002; Ling Li 001; Xi Li 003; Mingzhe Zhang; Chao Wang 003; Haibo Meng; Xuehai Zhou; Yunji Chen (IEEE Trans. Parallel Distributed Syst., 2015)

Display power reduction for mobile closed-source games. - Zhinan Cheng; Xi Li 003; Jiachen Song; Beilei Sun; Xuehai Zhou; Chao Wang 003 (ASAP, 2016)

FCM: Towards Fine-Grained GPU Power Management for Closed Source Mobile Games. - Jiachen Song; Xi Li 003; Beilei Sun; Zhinan Cheng; Chao Wang 003; Xuehai Zhou (ACM Great Lakes Symposium on VLSI, 2016)

PIE: A Pipeline Energy-Efficient Accelerator for Inference Process in Deep Neural Networks. - Yangyang Zhao; Qi Yu; Xuda Zhou; Xuehai Zhou; Xi Li 003; Chao Wang 003 (ICPADS, 2016)

SOLAR: Services-Oriented Learning Architectures. - Chao Wang 003; Xi Li 003; Qi Yu; Aili Wang 003; Patrick Hung; Xuehai Zhou (ICWS, 2016)

FairPlay: Services Migration with Lock-Free Mechanisms for Load Balancing in Cloud Architectures. - Chao Wang 003; Jinhong Zhou; Xi Li 003; Aili Wang 003; Xuehai Zhou (ICWS, 2016)

Behavior-Aware Integrated CPU-GPU Power Management for Mobile Games. - Zhinan Cheng; Xi Li 003; Beilei Sun; Jiachen Song; Chao Wang 003; Xuehai Zhou (MASCOTS, 2016)

Brief Announcement: MIC++: Accelerating Maximal Information Coefficient Calculation with GPUs and FPGAs. - Chao Wang 003; Xi Li 003; Aili Wang 003; Xuehai Zhou (SPAA, 2016)

SCADIS: A Scalable Accelerator for Data-Intensive String Set Matching on FPGAs. - Shiming Lei; Chao Wang 003; Haijie Fang; Xi Li 003; Xuehai Zhou (Trustcom/BigDataSE/ISPA, 2016)

Soft computing in big data intelligent transportation systems. - Chao Wang 003; Xi Li 003; Xuehai Zhou; Aili Wang 003; Nadia Nedjah (Appl. Soft Comput., 2016)

KUMMS: optimising DRAM locality with Kernel-user behaviours. - Beilei Sun; Xi Li 003; Chao Wang 003; Bo Wan; Xuehai Zhou (Int. J. High Perform. Syst. Archit., 2016)

Memory Power Optimization on Different Memory Address Mapping Schemas. - Zongwei Zhu; Yanjun Hu; Xi Li 003; Xuehai Zhou (J. Inf. Sci. Eng., 2016)

Definitions of predictability for Cyber Physical Systems. - Beilei Sun; Xi Li 003; Bo Wan; Chao Wang 003; Xuehai Zhou; Xianglan Chen (J. Syst. Archit., 2016)

Hardware Implementation on FPGA for Task-Level Parallel Dataflow Execution Engine. - Chao Wang 003; Junneng Zhang; Xi Li 003; Aili Wang 003; Xuehai Zhou (IEEE Trans. Parallel Distributed Syst., 2016)

Evaluation and Tradeoffs for Out-of-Order Execution on Reconfigurable Heterogeneous MPSoC. - Qi Guo 001; Xi Li 003; Chao Wang 003; Xuehai Zhou (IEEE Trans. Very Large Scale Integr. Syst., 2016)

PUMA: From Simultaneous to Parallel for Shared Memory System in Multi-core. - Gangyong Jia; Liang Shi 001; Xi Li 003; Dong Dai 001 (J. Signal Process. Syst., 2016)

Clockwerk: A Predictable and Efficient Extension of Logical Execution Time Model. - Bo Wan; Xi Li 003; Kaiqi Zhou; Haizhao Luo; Chao Wang 003; Xianglan Chen; Xuehai Zhou (APSEC, 2017)

A Power-Efficient Accelerator for Convolutional Neural Networks. - Fan Sun; Chao Wang 003; Lei Gong; Chongchong Xu; Yiwei Zhang 001; Yuntao Lu; Xi Li 003; Xuehai Zhou (CLUSTER, 2017)

OmniGraph: A Scalable Hardware Accelerator for Graph Processing. - Chongchong Xu; Chao Wang 003; Lei Gong; Yuntao Lu; Fan Sun; Yiwei Zhang 001; Xi Li 003; Xuehai Zhou (CLUSTER, 2017)

A Power-Efficient Accelerator Based on FPGAs for LSTM Network. - Yiwei Zhang 001; Chao Wang 003; Lei Gong; Yuntao Lu; Fan Sun; Chongchong Xu; Xi Li 003; Xuehai Zhou (CLUSTER, 2017)

A power-efficient and high performance FPGA accelerator for convolutional neural networks: work-in-progress. - Lei Gong; Chao Wang 003; Xi Li 003; Huaping Chen 001; Xuehai Zhou (CODES+ISSS, 2017)

FPGA Based Big Data Accelerator Design in Teaching Computer Architecture and Organization. - Chao Wang 003; Yuming Cheng; Lei Gong; Bo Wan; Aili Wang 003; Xi Li 003; Xuehai Zhou (CyPhy, 2017)

A Time-Aware Programming Framework for Constructing Predictable Real-Time Systems. - Bo Wan; Haizhao Luo; Kaiqi Zhou; Xi Li 003; Chao Wang 003; Xianglan Chen; Xuehai Zhou (HPCC/SmartCity/DSS, 2017)

GenServ: Genome Sequencing Services on Scalable Energy Efficient Accelerators. - Chao Wang 003; Haijie Fang; Shiming Lei; Lei Gong; Aili Wang 003; Xi Li 003; Xuehai Zhou (ICWS, 2017)

xFilter: A Temporal Locality Accelerator for Intrusion Detection System Services. - Chao Wang 003; Jinhong Zhou; Lei Gong; Xi Li 003; Aili Wang 003; Xuehai Zhou (ICWS, 2017)

Evaluation and Trade-offs of Graph Processing for Cloud Services. - Chongchong Xu; Jinhong Zhou; Yuntao Lu; Fan Sun; Lei Gong; Chao Wang 003; Xi Li 003; Xuehai Zhou (ICWS, 2017)

Tickwerk: Design of a LET-Based SoC for Temporal Programming. - Haizhao Luo; Xi Li 003; Bo Wan; Guixing Wu; Xianglan Chen; Chao Wang 003 (ISPA/IUCC, 2017)

A High-Performance Accelerator for Large-Scale Convolutional Neural Networks. - Fan Sun; Chao Wang 003; Lei Gong; Chongchong Xu; Yiwei Zhang 001; Yuntao Lu; Xi Li 003; Xuehai Zhou (ISPA/IUCC, 2017)

Exploiting Aperiodic Server to Improve Aperiodic Responsiveness for LET-Based Real-Time Systems. - Bo Wan; Xi Li 003; Haizhao Luo; Beilei Sun; Chao Wang 003; Xianglan Chen; Xuehai Zhou (ISPA/IUCC, 2017)

A Predictable Servant-Based Execution Model for Safety-Critical Systems. - Bo Wan; Xi Li 003; Bo Zhang; Kaiqi Zhou; Haizhao Luo; Chao Wang 003; Xianglan Chen; Xuehai Zhou (ISPA/IUCC, 2017)

Building a Game Benchmark for Cooperative CPU-GPU with Pseudo User-Interaction. - Zhen Wang; Zhinan Cheng; Xi Li 003; Chao Wang 003; Xianglan Chen; Xuehai Zhou (ISPA/IUCC, 2017)

Rethinking Energy-Efficiency of Heterogeneous Computing for CNN-Based Mobile Applications. - Zhen Wang; Xi Li 003; Chao Wang 003; Zhinan Cheng; Jiachen Song; Xuehai Zhou (ISPA/IUCC, 2017)

Implementation and Optimization of the Accelerator Based on FPGA Hardware for LSTM Network. - Yiwei Zhang 001; Chao Wang 003; Lei Gong; Yuntao Lu; Fan Sun; Chongchong Xu; Xi Li 003; Xuehai Zhou (ISPA/IUCC, 2017)

Work-in-Progress: TTI: A Timing ISA for LET Model in Safety-Critical Systems. - Bo Wan; Xi Li 003; Haizhao Luo; Chao Wang 003; Xianglan Chen; Xuehai Zhou (RTSS, 2017)

PowerSensor: A method for power optimization of smartphone through sensing wakelock application. - Bo Chen 010; Xi Li 003; Xuehai Zhou (WCSP, 2017)

Reconfigurable Hardware Accelerators: Opportunities, Trends, and Challenges. - Chao Wang 003; Wenqi Lou; Lei Gong; Lihui Jin; Luchao Tan; Yahui Hu; Xi Li 003; Xuehai Zhou (CoRR, 2017)

安全关键信息物理系统的时序可预测性 (Temporal Predictability in Safety Critical Cyber Physical System). - Xi Li 003; Beilei Sun; Bo Wan; Xianglan Chen; Xuehai Zhou (计算机科学, 2017)

Hot spots profiling and dataflow analysis in custom dataflow computing SoftProcessors. - Chao Wang 003; Xi Li 003; Huizhen Zhang; Aili Wang 003; Xuehai Zhou (J. Syst. Softw., 2017)

DLAU: A Scalable Deep Learning Accelerator Unit on FPGA. - Chao Wang 003; Lei Gong; Qi Yu; Xi Li 003; Yuan Xie 001; Xuehai Zhou (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017)

SuperMIC: Analyzing Large Biological Datasets in Bioinformatics with Maximal Information Coefficient. - Chao Wang 003; Dong Dai 001; Xi Li 003; Aili Wang 003; Xuehai Zhou (IEEE ACM Trans. Comput. Biol. Bioinform., 2017)

Service-Oriented Architecture on FPGA-Based MPSoC. - Chao Wang 003; Xi Li 003; Yunji Chen; Youhui Zhang; Oliver Diessel; Xuehai Zhou (IEEE Trans. Parallel Distributed Syst., 2017)

A Classroom Scheduling Service for Smart Classes. - Chao Wang 003; Xi Li 003; Aili Wang 003; Xuehai Zhou (IEEE Trans. Serv. Comput., 2017)

Delayed Wake-Up Mechanism Under Suspend Mode of Smartphone. - Bo Chen 010; Xi Li 003; Xuehai Zhou; Zongwei Zhu (CollaborateCom, 2018)

RTMUSRT: a real-time testbed for empirically comparing real-time multicore schedulers: work-in-progress. - Bo Wan; Bo Zhang; Xi Li 003; Kaiqi Zhou; Caixu Zhao; Chao Wang 003; Xuehai Zhou (EMSOFT, 2018)

Domino: An Asynchronous and Energy-efficient Accelerator for Graph Processing: (Abstract Only). - Chongchong Xu; Chao Wang 003; Yiwei Zhang 001; Lei Gong; Xi Li 003; Xuehai Zhou (FPGA, 2018)

MuDBN: An Energy-Efficient and High-Performance Multi-FPGA Accelerator for Deep Belief Networks. - Yuming Cheng; Chao Wang 003; Yangyang Zhao; Xianglan Chen; Xuehai Zhou; Xi Li 003 (ACM Great Lakes Symposium on VLSI, 2018)

Domino: Graph Processing Services on Energy-Efficient Hardware Accelerator. - Chongchong Xu; Chao Wang 003; Lei Gong; Lihui Jin; Xi Li 003; Xuehai Zhou (ICWS, 2018)

Impacts of Memory Address Mapping Scheme on Reducing DRAM Self-Refresh Power for Mobile Computing Devices. - Zongwei Zhu; Jing Cao; Xi Li 003; Junneng Zhang; Youqing Xu; Gangyong Jia (IEEE Access, 2018)

UniCNN: A Pipelined Accelerator Towards Uniformed Computing for CNNs. - Fan Sun; Chao Wang 003; Lei Gong; Yiwei Zhang 001; Chongchong Xu; Yuntao Lu; Xi Li 003; Xuehai Zhou (Int. J. Parallel Program., 2018)

Model checking of MARTE/CCSL time behaviors using timed I/O automata. - Bo Chen 010; Xi Li 003; Xuehai Zhou (J. Syst. Archit., 2018)

Refactoring Network Functions Modules to Reduce Latencies and Improve Fault Tolerance in NFV. - Muhammad Taqi Raza; Songwu Lu; Mario Gerla; Xi Li 003 (IEEE J. Sel. Areas Commun., 2018)

MALOC: A Fully Pipelined FPGA Accelerator for Convolutional Neural Networks With All Layers Mapped on Chip. - Lei Gong; Chao Wang 003; Xi Li 003; Huaping Chen 001; Xuehai Zhou (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

Device-Customized Multi-Carrier Network Access on Commodity Smartphones. - Yuanjie Li; Chunyi Peng 001; Haotian Deng 001; Zengwen Yuan; Guan-Hua Tu; Jiayao Li; Songwu Lu; Xi Li 003 (IEEE/ACM Trans. Netw., 2018)

Accelerating Distributed Training in Heterogeneous Clusters via a Straggler-Aware Parameter Server. - Huihuang Yu; Zongwei Zhu; Xianglan Chen; Yuming Cheng; Yahui Hu; Xi Li 003 (HPCC/SmartCity/DSS, 2019)

A Thread-Oriented Memory Resource Management Framework for Mobile Edge Computing. - Zongwei Zhu; Fan Wu; Jing Cao; Xi Li 003; Gangyong Jia (IEEE Access, 2019)

Power Optimization of WiFi Networks based on RSSI-awareness. - Bo Chen 010; Xi Li 003; Xuehai Zhou (EAI Endorsed Trans. Mob. Commun. Appl., 2019)

DCW: A Reactive and Predictable Programming Framework for LET-Based Distributed Real-Time Systems. - Bo Wan; Xi Li 003; Bo Zhang; Caixu Zhao; Xianglan Chen; Chao Wang 003; Xuehai Zhou (ACM Trans. Design Autom. Electr. Syst., 2019)

WiderFrame: An Automatic Customization Framework for Building CNN Accelerators on FPGAs: Work-in-Progress. - Lei Gong; Chao Wang 003; Xi Li 003; Xuehai Zhou (CODES+ISSS, 2020)

WooKong: A Ubiquitous Accelerator for Recommendation Algorithms With Custom Instruction Sets on FPGA. - Chao Wang 003; Lei Gong; Xiang Ma; Xi Li 003; Xuehai Zhou (IEEE Trans. Computers, 2020)

A Ubiquitous Machine Learning Accelerator With Automatic Parallelization on FPGA. - Chao Wang 003; Lei Gong; Xi Li 003; Xuehai Zhou (IEEE Trans. Parallel Distributed Syst., 2020)

UH-JLS: A Parallel Ultra-High Throughput JPEG-LS Encoding Architecture for Lossless Image Compression. - Xuan Wang 020; Lei Gong; Chao Wang 003; Xi Li 003; Xuehai Zhou (ICCD, 2021)

GenSeq+: A Scalable High-Performance Accelerator for Genome Sequencing. - Chao Wang 003; Lei Gong; Shiming Lei; Haijie Fang; Xi Li 003; Aili Wang 003; Xuehai Zhou (IEEE ACM Trans. Comput. Biol. Bioinform., 2021)

Improving HW/SW Adaptability for Accelerating CNNs on FPGAs Through A Dynamic/Static Co-Reconfiguration Approach. - Lei Gong; Chao Wang 003; Xi Li 003; Xuehai Zhou (IEEE Trans. Parallel Distributed Syst., 2021)

SOLAR: Services-Oriented Deep Learning Architectures-Deep Learning as a Service. - Chao Wang 003; Lei Gong; Xi Li 003; Qi Yu; Aili Wang 003; Patrick Hung; Xuehai Zhou (IEEE Trans. Serv. Comput., 2021)

Work-in-Progress: Scheduler for Collaborated FPGA-GPU-CPU Based on Intermediate Language. - Nan Hu; Chao Wang 003; Xuehai Zhou; Xi Li 003 (CODES+ISSS, 2022)

Heterogeneous computing on mobile GPU-FPGA cooperation platform. - Nan Hu; Xuehai Zhou; Xi Li 003 (Int. J. High Perform. Syst. Archit., 2022)

Work-in-Progress: NAPMAE: Generalized Data-Efficient Neural Architecture Predictor with Masked Autoencoder. - Qiaochu Liang; Lei Gong; Chao Wang 003; Xuehai Zhou; Xi Li 003 (CODES+ISSS, 2023)

FastRW: A Dataflow-Efficient and Memory-Aware Accelerator for Graph Random Walk on FPGAs. - Yingxue Gao; Teng Wang; Lei Gong; Chao Wang 003; Xi Li 003; Xuehai Zhou (DATE, 2023)

NeuralMAE: Data-Efficient Neural Architecture Predictor with Masked Autoencoder. - Qiaochu Liang; Lei Gong; Chao Wang 003; Xuehai Zhou; Xi Li 003 (PRCV (8), 2023)

IRGA: An Intelligent Implicit Real-time Gait Authentication System in Heterogeneous Complex Scenarios. - Li Yang 005; Xi Li 003; Zhuoru Ma; Lu Li; Neal N. Xiong; Jianfeng Ma 001 (ACM Trans. Internet Techn., 2023)

Enabling Fast and Memory-Efficient Acceleration for Pattern Matching Workloads: The Lightweight Automata Processing Engine. - Lei Gong; Chao Wang 003; Haojun Xia; Xianglan Chen; Xi Li 003; Xuehai Zhou (IEEE Trans. Computers, 2023)

Algorithm/Hardware Co-Optimization for Sparsity-Aware SpMM Acceleration of GNNs. - Yingxue Gao; Lei Gong; Chao Wang 003; Teng Wang; Xi Li 003; Xuehai Zhou (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

COBRA: A Continual Learning Approach to Vision-Brain Understanding. - Xuan-Bac Nguyen; Arabinda Kumar Choudhary; Pawan Sinha; Xi Li 003; Khoa Luu (CoRR, 2024)

Enhancing Graph Random Walk Acceleration via Efficient Dataflow and Hybrid Memory Architecture. - Yingxue Gao; Teng Wang; Lei Gong; Chao Wang 003; Yiqing Hu; Yi Yang; Zhongming Liu; Xi Li 003; Xuehai Zhou (IEEE Trans. Computers, 2024)

MultiRuler: A Multi-Dimensional Resource Modeling Method for Embedded Intelligent Systems of Autonomous Driving. - Youqing Xu; Boyu Li 006; Zongwei Zhu; Weihong Liu; Gangyong Jia; Guangjie Han; Xi Li 003 (IEEE Trans. Veh. Technol., 2024)

Hardware Accelerated Vision Transformer via Heterogeneous Architecture Design and Adaptive Dataflow Mapping. - Yingxue Gao; Teng Wang; Lei Gong; Chao Wang 003; Dong Dai 001; Yang Yang 080; Xianglan Chen; Xi Li 003; Xuehai Zhou (IEEE Trans. Computers, 2025)

Magnifier: A Chiplet Feature-Aware Test Case Generation Method for Deep Learning Accelerators. - Boyu Li 006; Zongwei Zhu; Weihong Liu; Qianyue Cao; Changlong Li; Cheng Ji 002; Xi Li 003; Xuehai Zhou (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)

Advancing Neuromorphic Architecture Toward Emerging Spiking Neural Network on FPGA. - Yingxue Gao; Teng Wang; Yang Yang 080; Lei Gong; Xianglan Chen; Chao Wang 003; Xi Li 003; Xuehai Zhou (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)