Evaluating irregular memory access on OpenCL FPGA platforms: A case study with XSBench. - Yingyi Luo; Xianshan Wen; Kazutomo Yoshii; Seda Ogrenci Memik; Gokhan Memik; Hal Finkel; Franck Cappello (FPL, 2017)

A 1GS/s 82dB Peak-SFDR 12b Single-Channel Pipe-SAR ADC with Harmonic-Injecting Cross-Coupled-Pair and Fast N-replica Bootstrap Switch Achieving 7.5fj/conv-step. - Liang Fang; Tao Fu; Xianshan Wen; Ping Gui (CICC, 2021)

Controller Area Network (CAN) Bus Transceiver with Authentication Support. - Xianshan Wen; Ruobing Hua; Jianye Liu; Tao Fu; Liang Fang; Xiaoran Wang; Mitchell A. Thornton; Ping Gui (ISCAS, 2022)

A 12-Bit 1 GS/s RF Sampling Pipeline-SAR ADC With Harmonic Injecting Cross-Coupled Pair Achieving 7.5 fj/Conv-Step. - Liang Fang; Xianshan Wen; Tao Fu; Ping Gui (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

A 2.56-GS/s 12-bit 8x-Interleaved ADC With 156.6-dB FoMS in 65-nm CMOS. - Liang Fang; Xianshan Wen; Tao Fu; Guanhua Wang; Sandeep Miryala; Tiehui Ted Liu; Ping Gui (IEEE Trans. Very Large Scale Integr. Syst., 2022)

Controller Area Network (CAN) Bus Transceiver with Enhanced Rail Converter. - Weizhong Chen; Can Hong; Xianshan Wen; Mitchell A. Thornton; Ping Gui (MWSCAS, 2024)

A 12-bit 1.1GS/s Pipelined-SAR ADC With Adaptive Inter-Stage Redundancy in 28 nm CMOS. - Xianshan Wen; Tao Fu; Liang Fang; Ping Gui (IEEE Access, 2024)

A 2.1 GS/s 2-Channel Pipeline-SAR ADC With Speed-Enhanced Bootstrap Switch and Low-Latency SAR Logic. - Tao Fu; Xianshan Wen; Liang Fang; Ping Gui (IEEE Access, 2025)

Secure Controller Area Network (CAN) Transceiver With Embedded Authentication Support. - Weizhong Chen; Xianshan Wen; Can Hong; Theodore W. Manikas; Mitchell A. Thornton; Ping Gui (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)